4 - 1SECTION 4 CIRCUIT DESCRIPTION4-1 RECEIVER CIRCUITS• ANTENNA SWITCHINGThe antenna switching circuit toggles the receive (RX) line andtransmit (TX) line.The received signals from the antenna are passed througha two-staged Low-Lass Filter (LPF; L1, L2, C1−C5) andthen applied to the antenna switch (D1, D2, D8, L15, L58,C52, C76, C516).While transmitting, the voltage on the T5V line is appliedto D1, D2 and D8, and these are ON. Thus the TX line isconnected to the antenna. Simultaneously, the RX line isconnected to the GND to prevent transmit signal entering.While receiving, no voltage is applied to the D1, D2 andD8, and these are OFF. Thus the TX line and the antennais disconnected to prevent received signals entering.Simultaneously, the RX line is disconnected from the GNDand the received signals are passed through the LPF (L15,L58, C52, C76, C516).The fi ltered signals are applied to the RF circuits.• RF CIRCUITS (RF UNIT)RF circuits filter and amplify the received signals within thefrequency coverage.The received signals from the antenna switch are passedthrough a tuned Bandpass filter (BPF; D9, L16, C81) andapplied to the RF amplifier (Q12) that received signals areamplified in low NF rate.The pass band frequency of the tuned BPF (D9, L16, C81)is adjusted by the tuning voltage “T1” from the D/A converter(IC10, pin 2), to suppress unwanted signals for high selectivity.The amplified received signals are passed through thetuned BPF (D11, D12, L18, C92, C94, C96, C502), limiter(D72) and the tuned BPF (D65, L57, C505, C507), thenapplied to the 1st mixer (Q13).• 1ST IF CIRCUITS (RF UNIT)The received signals are converted into the 1st IF signal,fi ltered and amplifi ed at the 1st IF circuits.The signals from the RF circuits are applied to the 1st mixer(Q13) and converted into the fixed frequency of 1st IF signalby mixing with the 1st Local Oscillator (LO) signals from theVCO (Q76, D59−D61). By changing the 1st LO frequency,only the desired frequency will pass through a pair ofcrystal filters at the next stage of the mixer. By changing LOfrequency, the frequency of the 1st IF signal is fixed one forthe receiving frequency.The converted 1st IF signal is passed through the BPF (FI1)and limiter (D63), then amplified by the 1st IF amplifier (Q14).The amplified 1st IF signal is applied to the IF IC (IC2, pin 16).• 2ND IF CIRCUITS (RF UNIT)The 1st IF signal is converted into the 2nd IF signal anddemodulated.The 1st IF signal from the 1st IF circuits are converted intothe 2nd IF signal at the 2nd mixer section of the IF IC (IC2),by mixing with the 2nd LO signal which is generated atthe reference frequency oscillator (X4) after being passedthrough the PLL IC (IC19, pins 1, 2) and the tripler (Q81).The converted 2nd IF signal is output from pin 3 and passedthrough the BPF (FI2) to remove the sideband noise, thenapplied to the 2nd IF amplifier section in IC2 (pin 5). Theamplified 2nd IF signal is then applied to the FM-detectorsection. The demodulated AF signals are output from pin 9and applied to the AF circuits.• AF CIRCUITS (LOGIC UNIT)The demodulated AF signals from the IF IC are amplifiedand fi ltered at the AF circuits.AF signals from the 2nd IF circuits are passed through thethe HPF (IC3, pins 6, 7), and LPF (IC3, pins 13, 14) via theTX/RX AF switches (IC4, pins 1, 2; 10, 11). The switchedAF signals are passed through the D/A converter (RF UNIT;IC10, pins 11, 12) for audio level adjustment.The D/A converter is a level controller IC which adjustsAF signal level according to the control signals (“DATA,”“STROBE,” “CLOCK”) from the CPU (IC8).The level adjusted AF signals are then applied to the AF poweramplifier (IC23, pin 4) to be amplified to obtain rated audiooutput power. The power-amplified AF signals are output frompin 10, and then drive internal or external speaker.D/A converter(IC10)MixerRSSIQuadraturedetector2324From the 1st IF amplifier (Q14)16NoisedetectorR5VX31110IF IC (IC2)Filteramp.Noiseamp.Limiteramp.Demodulated signalsto the LOGIC UNIT• 2nd IF AND DEMODULATOR CIRCUITS9“NOIS” signal to the CPU (LOGIC UNIT: IC8, pin 17)“SD” signal to the CPU (LOGIC UNIT: IC8, pin 90)1312Q812nd IF filterX415.3 MHz45.9 MHz238 7 35FI2 PLL IC(IC19)12