Icom IC-V85 Service Manual

Also see for IC-V85: Step-by-Step Programming Guide Instruction manual Service manual Instruction manual

Contents

4 - 34-3 FREQUENCY SYNTHESIZER CIRCUITS• VCO (RF UNIT)VCO (Voltage Controlled Oscillator) is a oscillator whoseoscillating frequency is controlled by adding voltage (lockvoltage).VCO oscillates the both of transmit and 1st LO signals. TheVCO output signals are buffer-amplified by Q74 and Q75.While receiving, the VCO output is passed through the TX/RXswitch (D4) and the LPF (L29, L38, L59, C102, C435, C437,C539), then applied to the 1st mixer (Q13) to be mixed withthe received signals to produce the 46.35 MHz 1st IF signal.While transmitting, the buffer-amplified VCO output ispassed through the TX/RX switch (D3) and applied to thetransmit amplifiers.• PLL (Phase Locked Loop) CIRCUIT (RF UNIT)The PLL circuit provides stable oscillation of the transmitfrequency and receive 1st LO frequency. The PLL outputfrequency is controlled by the divided ratio (N-data) from theCPU.A portion of VCO output is applied to the PLL IC (IC19, pin 8)via buffer amplifiers (Q5, Q75). The applied signal is dividedat the pre-scalar and programmable counter according tothe control signals “PLLSTB,” “PLLDATA” and “PLLCK” fromthe CPU (L; IC8, pins 63, 65 and 66). The divided signalis phase-compared with the reference frequency signalfrom the reference frequency oscillator (X4), at the phasedetector.The phase difference is output from pin 5 as a pulse typesignal after being passed through the internal charge pump.The output signal is converted into the DC voltage (lockvoltage) by passing through the loop filter (R445−R448,C472−C475, C519). The lock voltage is applied to thevariable capacitors (D59 and D60) of VCO (Q76, D59−D61)and locked to keep the VCO oscillating frequency constant.If the oscillated signal drifts, its phase changes from that ofthe reference frequency, causing a lock voltage change tocompensate for the drift in the VCO oscillating frequency.LPF LPFIC26T3Power detectorOPAMP+−PWRAMPDrv.AMPPre-drv.AMP213Q3• APC CIRCUITSQ2 Q1D1ANTSWANTVCO outputfrom bufffer-amp (Q74) D3TX/RXSWTXCPS5VLoopfilterBufferQ75• PLL CIRCUITSBufferQ74BufferQ5to transmitter circuitsto 1st mixer (Q13)D3D45 8Q76, D59−D61VCOPLL IC (IC19 )×345.9 MHz 2nd LOsignal to the FM IF IC(IC2, pin 2)Q81Shift registerPrescalerPhasedetectorChargepumpProgrammabledividerPLLCKPLLSTB1291011 PLLDATALPFPLL control signalsfrom CPU (LOGIC UNIT; IC8)15.3 MHz reference signalfrom reference frequency osciilator (X4)• APC (Automatic Power Control) CIRCUIT (RF UNIT)The APC (Automatic Power Control) circuit prevents thetransition of the transmit output power level which is causedby load mismatching or heat effect, etc.At the power detector (D32, D33), a portion of the transmitsignal is rectified into DC voltage which is proportional tothe transmit power level.The rectified voltage is applied to the inverted input terminalof the operational amplifier (IC26, pin 2). The voltage “T3”from the D/A converter (IC10, pin 10) is applied to the non-inverted input terminal as the reference.The operational amplifier compares the rectified voltageand reference voltage “T3,” and the difference of the voltageis output from the operational amplifier pin 1. The outputvoltage controls the bias of drive (Q2) and power (Q1)amplifiers for stable transmit output power.The change of transmit power is carried out by changing thereference voltage “T3”, and transmit muting (deactivation ofdrive and power amplifiers) is carried out by TX switch (Q37)controlled by “TXC” signal from CPU (LOGIC UNIT; IC8, pin59).