NXR-70010TX Mod19.2MHzPLL circuit IC3075V #25V #119.2MHzQ211CF2015V #14.5MHzQ2125V #1Q2135V #1TX mainPLL circuit4.5MHzIC202DDS IC ATT ATTFig. 4 Transmitter DDS circuit2-5. Transmitter main PLL circuitThe transmitter main PLL circuit consists of the VCO(Q102 and Q103), PLL IC (IC101) and divide-by-2 circuit(IC811) and produces the transmitter frequency signal.The VCO Q102 produces transmitter frequencies from136.000MHz to 144.995MHz. (The transmitter frequency ofthe VCO is from 272.000MHz to 289.990MHz.)The VCO Q103 produces transmitter frequencies from145.000MHz to 154.000MHz. (The transmitter frequency ofthe VCO is from 290.000MHz to 308.000MHz.)The signal produced by the VCO (Q102 or Q103) is fedto the buffer amplifier and is amplified by Q106. The higherharmonic wave is attenuated by LPF and returns to the PLLIC (IC101).IC101 divides the VCO oscillating frequency signal andtransmitter PLL reference signal (4.5MHz), and comparesthe phase with the 100kHz comparison frequency.The phase difference signal produced by the comparingphase is converted to a DC voltage by a lag-lead type loopfi lter.The DC signal is applied to varicaps D101, D102, D107,and D108 to lock the VCO oscillator frequency with the de-sired oscillator frequency.At the same time, the DC signal passes through theIC102 operational amplifier for monitoring the transmittermain PLL lock voltage.The output from the VCO passes through the buffer am-plifier Q104. The divide-by-2 circuit (IC811) divides the fre-quency and produces the transmitter frequency. The outputlevel of IC811 is about +6dBm (4mW).Q106TX DDScircuit 1/R1/NPDFref.=4.5MHzR=45Fpd=100kHz5V #2Q104Q1029V’ 9V’3V5V #25V #2272~289.99MHz272~308MHzIC102OP-AMPIC8114964.5MHzIC101PLL ICCVTDrivercircuit136~154MHzD108D107D101Q1039V’ 290~308MHzD1021/2ATT ATTFig. 5 Transmitter main PLL circuit2-4. Transmitter DDS circuitThe transmitter DDS circuit produces the transmittermain PLL reference frequency signal 4.5MHz.This circuit consists of IC307, IC202, CF201, Q210,Q211, Q212 and Q213.The 19.2MHz signal from the transmitter modulation19.2MHz PLL circuit is amplified by IC307 and supplied tothe IC202 reference signal pin.IC202 produces the transmitter main PLL 4.5MHz refer-ence frequency signal based on 19.2MHz on signal.The spurious output by IC202 is attenuated by CF201and LPF, 4.5MHz reference frequency signal is amplified byQ211, Q212, and Q213, and fed to the transmitter main PLL.The comparison frequency of the transmitter main PLL is100kHz and the PLL frequency step is 100kHz.However, minute frequency step such as 2.5kHz and3.125kHz because the DDS output frequency is variable.CIRCUIT DESCRIPTION