TK-32018CIRCUIT DESCRIPTION3. PLL Frequency SynthesizerThe PLL circuit generates the first local oscillator signal forreception and the RF signal for transmission.1) PLLThe frequency step of the PLL circuit is 5 or 6.25kHz.A 12.8MHz reference an oscillator signal is divided at IC1by a fixed counter to produce oscillator (VCO) output signalwhich is buffer amplified by Q2 then divided in IC1 by aprogrammable counter. The divided signal is compared inphase with the 5 or 6.25kHz reference signal from the phasecomparator in IC1. The output signal from the phasecomparator is filtered through a low-pass filter and passedto the VCO to control the oscillator frequency.(See Fig. 4)2) VCOThe operating frequency is generated by Q4. The oscillatorfrequency is controlled by applying the VCO control voltage,obtained from the phase comparator, to the varactor diodes(D4 and D7 in transmit mode). The RX pin is set high inreceive mode causing Q5 turn on.The TX pin is set high in transmit mode. The output fromQ4 is amplified by Q6 and sent to the RF amplifiers.3) Unlock DetectorIf a pulse signal appears at the LD pin of IC1, an unlockcondition occurs, and the DC voltage obtained from C4,R5, and D1 causes the voltage applied to the microprocessorto go low. When the microprocessor detects this condition,the transmitter is disabled, ignoring the push-to-talk switchinput signal.4. Transmitter System1) Microphone AmplifierThe signal from the microphone passes through IC301.The signal passes through the Audio processor (IC301) forthe maximum deviation adjustment and necessary processas pre-emphasized, and goes to the VCO modulation input.2) Drive and Final AmplifierThe signal from the T/R switch (D101 is on) is amplified bythe pre-drive (Q101) and drive amplifier (Q102) to 50mW.The output of the drive amplifier is amplified by the RF poweramplifier (Q103) to 0.5W. The RF power amplifier consistsof two MOS FET stages. The output of the RF poweramplifier is then passed through the harmonic filter (LPF)and antenna switch (D103 and D122) and applied to theantenna terminal.3) APC CircuitThe APC circuit always monitors the current flowing throughthe RF power amplifier (Q103) and keeps a constant current.The voltage drop at R127, R128 and R129 is caused by thecurrent flowing through the RF power amplifier and thisvoltage is applied to the differential amplifier IC101(1/2).IC101(2/2) compares the output voltage of IC101(1/2) withthe reference voltage from IC405. The output of IC101(2/2)controls the VG of the RF power amplifier, Drive amplifierand Pre-Drive amplifier to make both voltages the same.The change of power high/low is carried out by the changeof the reference voltage.PLL DATAX112.8MHzREF OSC1/M1/NPLL IC IC1PHASECOMPARATORCHARGEPUMPLPF6.25kHzD4,7 Q4TX VCOQ6BUFF AMPQ9RF AMPRXTXQ2BUFFERQ5, 7T/R SW6.25kHzLPFFig. 5 Microphone amplifierIC301IC405LPFQTTCXOQTVCOCPUAGCVCOMICX1TCXOLPFAK2346Fig. 4 PLL circuitFig. 6 Drive and final amplifier and APC circuitFromT/R SW(D101)DRIVEAMPRFPOWER AMP LPFANTSWD103D122ANTVGVGVDQ102 Q103Pre-DRIVEAMPQ101VDDRFAMPQ1005TR127R128R129+BIC101(1/2)IC101(2/2)PCTV(IC405)