TK-521016CIRCUIT DESCRIPTION5. PLL Frequency SynthesizerThe PLL Frequency Synthesizer consists of the followingcomponents:• VCXO (X301)• VCO (Q310, Q311)• Rheostat (IC414)• PLL IC (IC303)• 1/2 divider (IC304)• Local switch (D101, D210)5-1. VCXO (X301)VCXO (X301) generates a reference frequency of 16.8MHz for the PLL frequency synthesizer. This referencefrequency is applied to pin 8 of the PLL IC (IC303).The VCXO oscillation frequency is fine-adjusted bycontrolling the voltage applied to pin 1 of the VCXO with DAC(IC411). It is also controlled with pin 1 of the VCXO if theoutput from VCXO is modulated.5-2. VCOThere is a RX VCO and a TX VCO.The TX VCO (Q311) generates a transmit carrier and theRX VCO (Q310) generates a 1st local receive signal.For the VCO oscillation frequency, the transmit carrier is272 to 348 MHz and the 1st local receive signal is 371.9 to447.9 MHz.The VCO oscillation frequency is determined by onesystem of operation switching terminal "T/R" and twosystems of voltage control terminals "C/V" and "V-assist".The operation switching terminal, "T/R", is controlled bythe control line (T/R) output from the CPU (IC5). When the T/R logic is low, the VCO outputs the transmit carrier and whenit is high, it outputs a 1st local receive signal.The voltage control terminals, "CV" and "V-assist", arecontrolled by the PLL IC (IC303) and rheostat (IC414) and theoutput frequency changes continuously according to theapplied voltage. For the modulation input terminal, "MOD",the output frequency changes according to the appliedvoltage. This is used to modulate the VCO output. "MOD"works only when "T/R" is low.5-3. Rheostat (IC414)The rheostat (IC414) is connected to the VCO voltagecontrol terminal, "V-assist", and quickly controls the VCOoscillation frequency. However, its accuracy is low and theVCO frequency cannot be matched accurately with thedesired transmit carrier or the 1st local receive signal.The rheostat is controlled by the CPU (IC5) through the 3-line "PCS", "DAT", "CLK" serial bus.5-4. PLL IC (IC303)PLL IC compares the differences in phases of the VCOoscillation frequency and the VCXO reference frequency,returns the difference to the VCO CV terminal and realizesthe "Phase Locked Loop" for the return control. This allowsthe VCO oscillation frequency to accurately match (lock) thedesired frequency.When the frequency is controlled by the PLL, thefrequency convergence time increases as the frequencydifference increases when the set frequency is changed. Tosupplement this, the rheostat is used before control by thePLL IC to bring the VCO oscillation frequency close to thedesired frequency. As a result, the VCO CV voltage does notchange and is always stable at approx. 2 V.The desired frequency is set for the PLL IC by the CPU(IC5) through the 3-line "LE", "DAT", "CLK" serial bus. Whetherthe PLL IC is locked or not is monitored by the CPU throughthe “UL” signal line. If the VCO is not the desired frequency(unlock), the "UL" logic is low.5-5. 1/2 divider (IC304)The 1/2 divider (IC304) inputs the transmit carrier and the1st local receive signal output from the VCO and divides eachfrequency by 1/2. The frequency divided by 1/2 becomes acarrier that is actually sent and a 1st local receive signal that isactually input to a mixer. (Both the VCO and the PLL ICoperate with double frequencies in phase locked loops.)5-6. Local Switch (D101, D210)The connection destination of the signal output from the1/2 divider (IC304) is changed with the diode switch (D101)that is controlled by the transmission power supply, 5T, andthe diode switch (D210) that is controlled by the receivepower supply, 5R.If the 5T logic is high, it is connected to a send-side pre-pre-drive (Q101). If the 5T logic is low, it is connected to areceive-side mixer (IC202).6. Control CircuitThe control circuit consists of CPU (IC5) and its peripheralcircuits. It controls the TX-RX unit and transfers data to theControl unit. IC5 mainly performs the following;1) Switching between transmission and reception by PTTsignal input.2) Reading system, zone, frequency, and program data fromthe memory circuit.3) Sending frequency program data to the PLL.4) Controlling squelch on/off by the DC voltage from thesquelch circuit.5) Controlling the audio mute circuit by decode data input.6) Transmitting tone and encode data.6-1. Memory CircuitMemory circuit consists of the CPU (IC5) and a flashmemory (IC6). A flash memory has a capacity of 16M bits andFig. 8 PLL block diagramT/RIC414 V-assist TX: 272~348MHzRX: 371.9~447.9MHzRHEPCSDATCLKLEDATCLKIC304 Q314 D101 to pre-pre-driveLPF VCO 1/2 BUFF SWUL CVIC5IC303 Q312 D210 to 1st mixer(Q101)(IC202)CPUPLL LPF BUFF SWMODX301 IC411VCXO DAC