ContentsSection number Title PageChapter 1Preface1.1 Overview...........................................................................................................................................................................71.2 Device versions.................................................................................................................................................................71.3 Audience...........................................................................................................................................................................81.4 Document organization.....................................................................................................................................................81.5 Conventions......................................................................................................................................................................81.5.1 Numbering systems..............................................................................................................................................81.5.2 Typographic notation...........................................................................................................................................91.5.3 Special terms........................................................................................................................................................91.6 References.........................................................................................................................................................................10Chapter 2Platform Configuration Module (PCM)2.1 PCM memory map and register descriptions....................................................................................................................112.1.1 FEC Burst Optimization Master Control Register (PCM_FBOMCR)................................................................122.1.2 Bus Bridge Configuration Register 1 (PCM_IAHB_BE1)..................................................................................132.1.3 Bus Bridge Configuration Register 2 (PCM_IAHB_BE2)..................................................................................16Chapter 3Modular CAN (M_CAN)3.1 Chip-specific M_CAN information..................................................................................................................................193.1.1 M_CAN Message RAM allocation......................................................................................................................193.1.2 Introduction..........................................................................................................................................................193.1.3 Functional Description.........................................................................................................................................203.1.4 External Signals...................................................................................................................................................223.2 Overview...........................................................................................................................................................................233.2.1 Features................................................................................................................................................................233.2.2 Block Diagram.....................................................................................................................................................243.2.3 Dual Clock Sources..............................................................................................................................................26MPC5777C Reference Manual Addendum, Rev. 1, 12/2015Freescale Semiconductor, Inc. 3