3.5.2 Timestamp GenerationFor timestamp generation the M_CAN supplies a 16-bit wrap-around counter. Aprescaler TSCC[TCP] can be configured to clock the counter in multiples of CAN bittimes (1…16). The counter is readable via TSCV[TSC]. A write access to register TSCVresets the counter to zero. When the timestamp counter wraps around interrupt flagIR[TSW] is set.On start of frame reception / transmission the counter value is captured and stored intothe timestamp section of an Rx Buffer / Rx FIFO (RXTS[15:0]) or Tx Event FIFO(TXTS[15:0]) element.3.5.3 Timeout CounterTo signal timeout conditions for Rx FIFO 0, Rx FIFO 1, and the Tx Event FIFO theM_CAN supplies a 16-bit Timeout Counter. It operates as down-counter and uses thesame prescaler controlled by TSCC[TCP] as the Timestamp Counter. The TimeoutCounter is configured via register TOCC. The actual counter value can be read fromTOCV[TOC]. The Timeout Counter can only be started while CCCR[INIT] = 0. It isstopped when CCCR[INIT] = 1, e.g. when the M_CAN enters Bus_Off state.The operation mode is selected by TOCC[TOS]. When operating in Continuous mode,the counter starts when CCCR[INIT] is reset. A write to TOCV presets the counter to thevalue configured by TOCC[TOP] and continues down-counting.When the Timeout Counter is controlled by one of the FIFOs, an empty FIFO presets thecounter to the value configured by TOCC[TOP]. Down-counting is started when the firstFIFO element is stored. Writing to TOCV has no effect.When the counter reaches zero, interrupt flag IR[TOO] is set. In Continuous Mode, thecounter is immediately restarted at TOCC[TOP].NoteThe clock signal for the Timeout Counter is derived from theCAN Core's sample point signal. Therefore the point in timewhere the Timeout Counter is decremented may vary due to thesynchronization / re-synchronization mechanism of the CANCore. If the baud rate switch feature in CAN FD is used, thetimeout counter is clocked differently in arbitration and datafield.Chapter 3 Modular CAN (M_CAN)MPC5777C Reference Manual Addendum, Rev. 1, 12/2015Freescale Semiconductor, Inc. 97
