5-4 | ni.comChapter 5 CountersFigure 5-4 shows the timing requirements for the Ctr0Gate signal.Figure 5-4. Ctr0Gate Timing RequirementsCounter 0 Internal Output SignalThe Counter 0 Internal Output (Ctr0InternalOutput) signal is the output of Counter 0. This signalreflects the terminal count (TC) of Counter 0. The counter generates a terminal count when itscount value rolls over. The two software-selectable output options are pulse on TC and toggleoutput polarity on TC. The output polarity is software-selectable for both options. Figure 5-5shows the behavior of the Ctr0InternalOutput signal.Figure 5-5. Ctr0InternalOutput Signal BehaviorYou can use Ctr0InternalOutput in the following applications:• In pulse generation mode, the counter drives Ctr0InternalOutput with the generated pulses.To enable this behavior, software configures the counter to toggle Ctr0InternalOutputon TC.• Counter 0 and 1 can be daisy-chained together by routing Ctr0InternalOutput to Ctr1Gate.• Ctr0InternalOutput can drive any of the RTSI <0..6> signals to control the behavior of otherdevices in the system.• Ctr0InternalOutput drives the CTR 0 OUT pin to trigger or control external devices.• Ctr0InternalOutput can drive other internal signals.Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for moreinformation.Rising-EdgePolarityFalling-EdgePolarityt wt w = 10 ns minimumCtr0SourceCtr0InternalOutput(Pulse on TC)Ctr0InternalOutput(Toggle Output on TC)TC