© National Instruments | 6-16Programmable FunctionInterfaces (PFI)The 10 Programmable Function Interface (PFI) pins allow timing signals to be routed to andfrom the I/O connector of a device.InputsAn external timing signal can be input on any PFI pin and multiple timing signals cansimultaneously use the same PFI pin. This flexible routing scheme reduces the need to changethe physical connections to the I/O connector for different applications. For more information,refer to the Timing Signal Routing section of Chapter 7, Digital Routing.When using the PFI pin as an input, you can individually configure each PFI for edge or leveldetection and for polarity selection. You can use the polarity selection for any of the timingsignals, but the edge or level detection depends upon the particular timing signal beingcontrolled. The detection requirements for each timing signal are listed within the section thatdiscusses that signal.In edge-detection mode, the minimum pulse width required is 10 ns. This applies for bothrising-edge and falling-edge polarity settings. There is no maximum pulse width requirement inedge-detect mode.In level-detection mode, there are no minimum or maximum pulse width requirements imposedby the PFI signals, but there can be limits imposed by the particular timing signal beingcontrolled.OutputsYou can also individually enable each PFI pin to output a specific internal timing signal. Forexample, if you need the Counter 0 Source signal as an output on the I/O connector, softwarecan turn on the output driver for the PFI 8/CTR 0 SRC pin. This signal, however, cannot beoutput on any other PFI pin.