National Instruments Data Acquisition Device E Series User Manual

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National Instruments Data Acquisition Device E Series User Manual Manual pdf 109 page image

Chapter 5 CountersE Series User Manual 5-4 ni.comThe maximum allowed frequency is 20 MHz, with a minimum pulse widthof 10 ns high or low. There is no minimum frequency.For most applications, unless you select an external source, the20MHzTimebase signal or the 100kHzTimebase signal generates theCtr0Source signal.Counter 0 Gate SignalYou can select any PFI as well as many other internal signals like theCounter 0 Gate (Ctr0Gate) signal. The Ctr0Gate signal is configured inedge-detection or level-detection mode depending on the applicationperformed by the counter. The gate signal can perform many differentoperations including starting and stopping the counter, generatinginterrupts, and saving the counter contents.You can export the gate signal connected to Counter 0 to the PFI 9/CTR0 GATE pin, even if another PFI is inputting the Ctr0Gate signal. Thisoutput is set to high-impedance at startup.Figure 5-4 shows the timing requirements for the Ctr0Gate signal.Figure 5-4. Ctr0Gate Timing RequirementsRising-EdgePolarityFalling-EdgePolaritytwt w = 10 ns minimum