National Instruments sbRIO-9651 Design Manual

Also see for sbRIO-9651: Quick start guide

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National Instruments sbRIO-9651 Design Manual Manual pdf 35 page image

2-2 | ni.comChapter 2 User-Defined FPGA SignalsGBE1 Signal Definitions on the Reference CarrierBoardTable 2-1 describes the GBE1 pins and signals on the sbRIO-9651 SOM connector used toimplement a secondary Ethernet port on the reference carrier board.Table 2-1. GBE1 Signal DefinitionsSignal Name Pin # *DIO Signal onReferenceCarrier Board Direction† DescriptionTX SignalsGBE1_GMII_GTX_CLK 192 DIO_62_N O Gigabit transmitclock.GBE1_MII_TX_CLK 207 DIO_60_SRCC I 10/100 transmitclock.GBE1_GMII_TX_EN 215 DIO_60_N O Transmitenable.GBE1_GMII_TX_ER 183 DIO_59 O Transmit error.GBE1_GMII_TX_D0GBE1_GMII_TX_D1GBE1_GMII_TX_D2GBE1_GMII_TX_D3GBE1_GMII_TX_D4GBE1_GMII_TX_D5GBE1_GMII_TX_D6GBE1_GMII_TX_D7235227211203187179234242DIO_49_NDIO_49DIO_48_NDIO_48DIO_47_NDIO_47DIO_46_NDIO_46O Transmit databus.RX SignalsGBE1_GMII_RX_CLK 231 DIO_61_MRCC I Receive clock.GBE1_GMII_RX_DV 200 DIO_62_MRCC I Receive datavalid.GBE1_GMII_RX_ER 239 DIO_61_N I Receive error.