Oki TF-300P Field Service Manual

Contents

6-16. CIRCUIT DESCRIPTION6.1 Main Board CircuitThe mother board version is the first version that begins mass-production and the circuit diagramsconsists of 11 schematics which are described in the following sections.6.1.1 Block DiagramThe extended FAXENGINE chip set consists of an Integrated Fax Controller FC200(-M) and amodem chip (R96DFXL). The FC200(-M) performs all common facsimile machine control, monitorand interface function. Additionally, it contains scanner, printer, keyboard, stepping motor andmodem interfaces. These programmable functions and interfaces support a wide range ofperipherals. Integrated 8 bit pipeline ADC, clamp, sample hold and AGC allow minimum externalscanner interface hardware. Built-in DLC and shading correction combined with two-dimensionalError Diffusion and two-dimensional edge enhancement provides state-of-the-art image processingperformance in half-tone modes. The R96DFXL modem can execute modem can excu 9600bpsfax transmission and reception.6.1.2 Integrated Fax ControllerThe Advanced extended FAXENGINE Integrated Fax Controller (FC200-M) includes followingfeatures.1) Microprocessor.The embedded processor MC24TM in FC200(-M) provides 16-Mbyte memory addressingcapability over 24-bit address/8-bit data bus and dedicated control lines.2) Printer Interface Control.The FC200(-M) supplies programmable strobe and control signals that interface with most, if notall, thermal printers. In addition to Standard (non-Split) printing mode, latchless Split-printingmode and latchless two-clock mode can be supported. The three signals PDAT, PCLK, and PLATcontrol the transfer of data to the printer.3) Scanner Control.Four programmable control and timing signals supports CIS scanner interface. An internal 8-bitA/D converter is provided. Video processing supports DLC and two modes of shading correctionfor scanner data non-uniformity’s arising from uneven sensor output or uneven illumination.Correction may be provided to an 8-pixel group at a time or, separately to each pixel. Less than 1K of RAM is required to support shading correction. A Digital Adaptive Halftone image processingis supported. A 2-Dimensional error diffusion algorithm as well as a 2-D Edge Enhancementcontrol are performed in the hardware. Dynamic background and contrast control is provided fortext images. Multi-level horizontal B4 to A4 reduction is also provided for the scanner data.4) Motor Control.Eight outputs are provided to external current drivers; four for scanner motor.5) Image Coding Schemes.FC200 (-M) provides MMR data compression and decompression conformed with ITU-Trecommendation T.4.6) Real Time Clock (RTC).FC200 (-M) includes a battery backed-up real time clock. The life of the RTC is 32 years, and leapyear compensation is automatic.7) External Memory Support.External ROM stores the program object code. External RAM is used by processor for shadingcorrection and line buffer. DRAM controller supports refresh during battery operation. DRAMstores image and voice data.