PAN1322Application Note 13 Revision 1.2, 2013-12-18Design Guide2 Interfaces2.1 UART InterfaceThe UART interface is the main communication interface between the host and eUniStone. For the SPPapplication, communication between the host and the eUniStone is through AT commands over theUART interface.The interface consists of four UART signals for the AT interface and two GPIOs for additional lowpower mode control, as shown in Figure 2.Figure 2. UART Interface2.1.1 Low Power Mode ControlThe use of low power mode (LPM) control is optional. If not used, P0.14 shall be tied to VDDUART.The low power mode protocol for eUniStone is based on hardware signaling only. No AT commands orresponses are required for the low power mode protocol. The two GPIOs are used to tell the otherdevice (host or controller) when it may enter low power mode, when it should wake up and when itcannot transmit because the other device is in low power mode.To allow the eUniStone to enter low power mode, the host sets pin P0.14 low. When eUniStone isready, it will also allow the host to enter LPM by setting P0.0 low. Before entering LPM, the host shallset UART CTS of eUniStone high. Before entering LPM, eUniStone will set its own UART RTS high.UARTTXD UARTRXDUARTTXDUARTRXDUARTRTSUARTCTSUARTCTSUARTRTSHost eUniStoneP0.0P0.14BT_LPM_INBT_LPM_OUT
