Configuration Option TablesA-8 7112-A2-GB20-10March 1998Data Port Options MenuFor Data Port Options, refer to Table A-4. To access the Data Port Optionsscreen, follow this menu selection sequence:Main Menu →Configuration →Load Configuration From →Data PortTable A-4. Data Port Options (1 of 3)Port Base RatePossible Settings: Nx56, Nx64Default Setting: Nx64Allows selection of the base rate for the synchronous data port. The data rate for theport is a multiple (from 1 to 24) of the base rate specified with this configuration option.Nx64 – Sets the base rate for this port to 64 kbps. The data rate isNx64 kbps, whereNis a number from 1 to 24.Nx56 – Sets the base rate for this port to 56 kbps. The data rate isNx56 kbps, whereNis a number from 1 to 24.Invert Transmit ClockPossible Settings: Enable, DisableDefault Setting: DisableSpecifies whether the clock supplied by the DSU/CSU on the TXC interchange circuitDB (CCITT 114) is phase inverted with respect to the Transmitted Data interchangecircuit BA (CCITT 103). This configuration option is useful when long cable lengthsbetween the DSU/CSU and the DTE are causing data errors.Disable – Indicates TXC supplied by the DSU/CSU on this port is not phase inverted.Enable – Indicates TXC supplied by the DSU/CSU on this port is phase inverted.Transmit Clock SourcePossible Settings: Internal, ExternalDefault Setting: InternalSpecifies whether the transmitted data for the synchronous data port is clocked usingan internal clock provided by the DSU/CSU (synchronized to the clock source specifiedby the clock source configuration option) or an external clock provided by the DTEconnected to the synchronous data port. If an external clock is used, it must besynchronized to the same clock source as the DSU/CSU.Internal – Indicates the clock is provided internally by the DSU/CSU on the TXCinterchange circuit DB (CCITT 114).External – Indicates the clock is provided externally by the DTE on the XTXCinterchange circuit DA (CCITT 113). Use this selection if the clock source is set to thedata port.