User’s Manual 129Figure 12-7 shows the timing relationship among perclk, the external serial clock, anddata receive. Note that RxA is sampled by the rising edge of perclk.Figure 12-7. Synchronous Serial Data Receive Timing with External ClockWhen clocking the Rabbit externally, the maximum serial clock frequency is limited bythe amount of time required to synchronize the external clock with the Rabbit perclk. Ifwe sum the maximum number of perclk cycles required to perform clock synchroniza-tion for each of the receive and transmit cases, then the fastest external serial clock fre-quency would be limited to perclk/6.12.7 Serial Port Software SuggestionsThe receiver and transmitter share the same interrupt vector, but it is possible to make thereceive and transmit interrupt service routines (ISRs) separate by dispatching the interruptto either of two different routines. This is desirable to make the ISR less complex and toreduce the interrupt off time. No interrupts will be lost since distinct interrupt flip-flopsexist for receive and transmit. The dispatcher can test the receiver data register full bit todispatch. If this bit is on, the interrupt is dispatched for receive, otherwise for transmit.The receiver receives first consideration because it must be serviced attentively or datacould be lost.The dispatcher might look as follows.interrupt:PUSH AF ; 10IOI LD A,(SCSR) ; 7 get status register serial port COR A ; 2 test sign bitJP M,receive ; 7 go service the receive interruptJP transmit ; 7 (41 clocks to here) go service transmit interruptThe individual interrupts would assume that register AF has been saved and the status reg-ister has been loaded into register A.The interrupt service routines can, as a matter of good practice and obtaining optimumperformance, remove the cause of the interrupt and re-enable the interrupts as soon as pos-sible. This keeps the interrupt latency down and allows the fastest transmission speed onall serial ports.All the serial ports will normally generate priority level 1 interrupts. In exceptional circum-stances, one or more serial ports can be configured to use a higher priority interrupt. There isValidperclkCLKARxA(Ext.)
