WDTR If 1, expiration of the .i.watchdog timer; generates a .i.reset; of theEPC-2. If 0, only the WDT event is signalled.FWDT Fast .i.watchdog timer;. If clear, the period of the watchdog timer isabout 6.7 seconds. If set, the period is about 210 ms.A read of the MSC register also has a side effect of resetting the watchdogtimer. Therefore, if you are using the watchdog timer, the intention is thatyou are required to read this register within the defined period of the timer toprevent its generating an interrupt..i.Signal Register FIFO; (.i.SRF;)815E815FIf the signal register FIFO is not empty, a read of these registers returns theoldest value in the FIFO. The value is removed from the FIFO upon reading ofthe "lower" byte (port 815E). If the FIFO is empty, the value returned is notspecified.Register State after ResetA .i.hardware reset; of the EPC-2 (not a keyboard CTRL+ALT+DEL reset) clears allof the register bits to 0 (except those defined as a constant 1). The EPC-2'sBIOS, however, initializes some of the registers based on information from thesetup screen and elsewhere. The BIOS clears the .i.BIE; and .i.BEE; interruptand event enable registers.POS RegisterThe EPC-2 contains a .i.nonvolatile option register;, or .i.POS register;,containing information maintained by the BIOS. The information includes the.i.slot 0; enable, bus .i.arbitration priority;, .i.bus release mode;,.i.monitor type;, .i.arbitration mode;, DRAM size, .i.external clock; enable,and parallel port mode. Since the POS register is closely allied with correctoperation of the BIOS, it is not user programmable; thus programming informationis not provided in this manual.VMEbus AccessesTwo C-language examples are given here for performing .i.VMEbus accesses;(accesses to the VXI .i.data transfer bus;) through the .i.E page;. The firstperforms a 16-bit read from the VMEbus A16 space. It requires setting the.i.address modifier;, relocating the A16 address into the E page (address rangeE0000-EFFFF), and then accessing the value pointed to by a C pointer variable.#define WORD unsigned short#define LWORD unsigned longWORD addr; /* 16-bit A16 address */WORD data;WORD far * wptr;outp(0x8130,0); /* Set up E page as one contiguous region */outp(0x8132,1);outp(0x8134,2);outp(0x8136,3);outp(0x8151,0x0A); /* Set address modifier to A16 supervisory access */wptr = (WORD far *) (0xE0000000L + addr);data = *wptr; /* Read through window */The next example does a byte write into the VMEbus .i.A32; space. Here theupper 16 bits of the VME address need to be stored in the appropriate registers.Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com