Realtek RTD2120K Manual
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Realtek RTD2120-seriesconfidential 32Memory map of XFRRegister name Addr Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0Pin_share0 FF00 IIC2E PWM5E PWM4E PWM3E PWM2E PWM1E PWM0EPin_share1 FF01 A_DDC_PIN_SELD_DDC_PIN_SELPIN_INT1_EN CLKO2E IIC1EPin_share2 FF02 CLKO1E ADC3E ADC2E ADC1E ADC0EPort5_output_enable FF03 P57OE P56OE P55OE P54OE P53OE P52OE P51OE P50OEPort6_output_enable FF04 P67OE P66OE P65OE P64OE P63OE P62OE P61OE P60OEPort7_output_enable FF05 P77OE P76OEPort1_pad_type FF09 P17_PPO P16_PPO P15_PPO P14_PPO P13_PPO P12_PPO P11_PPO P10_PPOLVR_control FF0A VLTADC_control FF0B STRT_ADCADC_TEST BIAS_ADJ CK_SELADC0_convert_result FF0C ADC0_CONV_DATAADC1_convert_result FF0D ADC1_CONV_DATAADC2_convert_result FF0E ADC2_CONV_DATAADC3_convert_result FF0F ADC3_CONV_DATAPLL_control FF10 PLL_STA DVSET WD_RST WD_SET PWDN_PLLPLL_filter_control FF11 VR PLL_IPPLL_M_N_DIV FF12 M_CODE N_CODE DIVRegulator_control FF13 VBG V_SELADC_DDC_enable FF20 A_DDC_ADDR A_DDC_W_STAA_DDCRAM_W_ENA_DBN_ENA_DDC_ENADC_DDC_control FF21 A_DBN_CLK_SEL A_STOP_DBN_SEL A_SYS_CK_SEL A_DDC2 RST_A_DDCRVT_A_DDC1_ENDVI_DDC_enable FF23 D_DDC_ADDR D_DDC_W_STAD_DDCRAM_W_END_DBN_END_DDC_ENDVI_DDC_control FF24 D_DBN_CLK_SEL D_STOP_DBN_SEL D_SYS_CK_SEL D_DDC2 RST_D_DDCRVT_D_DDC1_ENDDCRAM_partition FF26 VS_CON DDCRAM_SIZIIC_set_slave FF27 IIC_ADDR CH_SELIIC_sub_in FF28 IIC_SUB_ADDRIIC_data_in FF29 IIC_D_INIIC_data_out FF2A IIC_D_OUT |
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