-50-72 PD16/D16/IRQ0 PW_PG_SEL PW365 232C Write SW(SH="H",PIXEL="L") I73 PD15/D15 DATA15 Data Bus 15 I/O74 PD14/D14 DATA14 Data Bus 14 I/O75 PD13/D13 DATA13 Data Bus 13 I/O76 PD12/D12 DATA12 Data Bus 12 I/O77 VCC 5V78 PD11/D11 DATA11 Data Bus 11 I/O79 VSS GND80 PD10/D10 DATA10 Data Bus 10 I/O81 PD9/D9 DATA9 Data Bus 9 I/O82 PD8/D8 DATA8 Data Bus 8 I/O83 PD7/D7 DATA7 Data Bus 7 I/O84 PD6/D6 DATA6 Data Bus 6 I/O85 VCC 5V86 PD5/D5 DATA5 Data Bus 5 I/O87 VSS GND88 PD4/D4 DATA4 Data Bus 4 I/O89 PD3/D3 DATA3 Data Bus 3 I/O90 PD2/D2 DATA2 Data Bus 2 I/O91 PD1/D1 DATA1 Data Bus 1 I/O92 PD0/D0 DATA0 Data Bus 0 I/O93 VSS GND94 XTAL XTAL OSC Signal Input I95 MD3 Mode-3 Mode-3 I96 EXTAL EXTAL OSC Signal Output O97 MD2 Mode-2 Mode-2 I98 NMI NONMASK NONMASK I99 VCC (FWP) FWP Flash Memory Write Mode I100 PA16/AH FLASH MODE FWP Control O101 PA17/WAIT O102 MD1 Mode-1 Mode-1 I103 MD0 Mode-0 Mode-0 I104 PLLVCC PLLVCC PLL Vcc105 PLLCAP PLLCAP PLL Filter106 PLLVSS PLLGND PLL Gnd107 PA15/CK M-CLK CPU Clock Output (Auto Image FPGA) O108 RES Reset Reset Active L I109 PE0/TIOC0A/DREQ0 PCTL CXD3511Q O110 PE1/TIOC0B/DRAK0 SCL 6 IIC Bus 6 Clock I/O111 PE2/TIOC0C/DREQ1 SDA 6 IIC Bus 6 Data I/O112 VCC 5V113 PE3/TIOC0D/DRAK1 SDA 3 IIC Bus 3 Data I/O114 PE4/TIOC1A SCL 3 IIC Bus 3 Clock I/O115 PE5/TIOC1B SDA 4 IIC Bus 4 Data I/O116 PE6/TIOC2A SCL 4 IIC Bus 4 Clock I/O117 VSS GND118 PF0/AN0 KEY1 Top Control Keys-1 (A/D Input) I119 PF1/AN1 KEY2 Top Control Keys-2 (A/D Input) I120 PF2/AN2 KEY3 Top Control Keys-3 (A/D Input) I121 PF3/AN3 OPT1 Logo Mark I122 PF4/AN4 Press Sensor Atmospheric Pressure Sensor I123 PF5/AN5 Temp Sensor Thermistor I124 AVSS GND A / D Gnd125 PF6/AN6 POWER FAIL Power Fail (L : Abnormality) I126 PF7/AN7 SDATA IN SDATA IN I127 AVREF 5V 5V A / D REF.128 AVCC 5V 5V A / D Vcc129 VSS Gnd130 PA0/RXD0 SH_RX PW365 Rx I131 PA1/TXD0 SH_TX PW365 Tx O132 PA2/SCK0/DREQ0/IRQ0133 PA3/RXD1 Rx RS232C Rx I134 PA4/TXD1 Tx RS232C Tx O135 VCC 5V136 PA5/SCK1/DREQ1/IRQ1 USB INTR USB Interrupt Signal Input Active L I137 PE7/TIOC2B SDA 5 IIC Bus 5 Data I/O138 PE8/TIOC3A SCL 5 IIC Bus 5 Clock I/O139 PE9/TIOC3B SDATA OUT Single to Dual converter Enhancer Data Output Signal O140 PE10/TIOC3C SCLK Single to Dual converter Enhancer Clock Output Signal O141 VSS Gnd142 PE11/TIOC3D EXP RESET I/ O Expander Active H O143 PE12/TIOC4A R/C R / C Input Active L I144 PE13/TIOC4B/MRES PW RESET PW365 Reset Signal Active L OPin No. Name Function Name Function Polarity I/OCPU and I/O-Expander Control port functions