-76-Electrical AdjustmentGrp / No. Item Function Range Initial Note16 DLYCNT (SLOT2) SLOT2 Clock Phase [Reserved] 0 - 255 117 DLYCNT (SLOT2) SLOT2 Clock Phase [Reserved] 0 - 255 118 DLYCNT (SLOT2) SLOT2 Clock Phase [Reserved] 0 - 255 119 DLYCNT (SLOT2) SLOT2 Clock Phase [Reserved] 0 - 255 190 SW FPGA -SETTING0 LVDS_AJY_TIM AV 0 - 7 01 LVDS_SJY_PHASE AV 0 - 255 1352 RSTOFF AV 0 - 1 03 LVDS_AJY_TIM Slot 0 - 74 LVDS_AJY_PHASE Slot 0 - 255 1355 RSTOFF Slot 0 - 1 0100 CXA70100 G SIG Center 0 - 255 1121 B SIG Center 0 - 255 1122 R SIG Center 0 - 255 1123 G Bright Control 0 - 255 04 B Bright Control 0 - 255 05 R Bright Control 0 - 255 06 G Gain Control 0 - 255 2087 B Gain Control 0 - 255 2088 R Gain Control 0 - 255 2089 G VCOM Control 0 - 255 15010 B VCOM Control 0 - 255 15011 R VCOM Control 0 - 255 15012 G SID Control A 0 - 255 5013 B SID Control A 0 - 255 5014 R SID Control A 0 - 255 5015 G SID Control B 0 - 255 5016 B SID Control B 0 - 255 5017 R SID Control B 0 - 255 5018 G SID Control C 0 - 255 17619 B SID Control C 0 - 255 17620 R SID Control C 0 - 255 17621 G SID Control D 0 - 255 022 B SID Control D 0 - 255 023 R SID Control D 0 - 255 024 G SID Control E 0 - 255 025 B SID Control E 0 - 255 026 R SID Control E 0 - 255 027 G SID Control F 0 - 255 028 B SID Control F 0 - 255 029 R SID Control F 0 - 255 030 G SIGFRINV 0 - 1 031 B SIGFRINV 0 - 1 132 R SIGFRINV 0 - 1 133 G SID1FRINV 0 - 1 034 B SID1FRINV 0 - 1 135 R SID1FRINV 0 - 1 136 G SID2FRINV 0 - 1 037 B SID2FRINV 0 - 1 138 R SID2FRINV 0 - 1 1101 CXD3550_TG0 SHP_R 0 - 127 251 SHP_G 0 - 127 252 SHP_B 0 - 127 253 SCANM 0 - 3 24 FRPM 0 - 3 25 HST_R_PC 0 - 127 76 HST_G_PC 0 - 127 77 HST_B_PC 0 - 127 78 HST_R_PF 0 - 127 129 HST_G_PF 0 - 127 1210 HST_B_PF 0 - 127 1211 DCK1_R_W 0 - 255 1012 DCK1_R_F 0 - 127 2413 DCK2_R_W 0 - 255 1014 DCK2_R_F 0 - 127 24
