Xilinx DPU IP Product Manual
                                           | |
Contents
| 
Chapter 1: OverviewDPU IP Product Guide www.xilinx.com 8PG338 (v1.2) March 26, 2019Example System with DPUThe figure below shows an example system block diagram with the Xilinx UltraScale+ MPSoC using acamera input. DPU is integrated into the system through AXI interconnect to perform deep learninginference tasks such as image classification, object detection, and semantic segmentation.DPUCameraAXI InterconnectController DDRARM R5DisplayPortUSB3.0SATA3.1PCIe Gen2GigEUSB2.0UARTSPIQuad SPINANDSDdemosaic gamma Color_conversionDMA AXIInterconnectAXIInterconnectMIPICSI2AXI InterconnectMIPICSI2X22329-030719Figure 3: Example System with Integrated DPUDNNDKDeep Neural Network Development Kit (DNNDK) is a full-stack deep learning toolchain for inferencewith the DPU.As shown in Figure 4, DNNDK is composed of Deep Compression Tool (DECENT), Deep Neural NetworkCompiler (DNNC), Neural Network Runtime (N2Cube), and DPU Profiler.Send Feedback |
Related manuals for Xilinx B1024
manualsdatabase
Your AI-powered manual search engine