Xilinx ML605 User Manual
Also see for Virtex-6 FPGA: User guideGuideHardware setup guideUser guideUser guide
                                                                                            | |
Contents
| 
ML605 Hardware User Guide www.xilinx.com 73UG534 (v1.2.1) January 21, 2010Configuration OptionsConfiguration OptionsThe FPGA on the ML605 Evaluation Board can be configured by the following methods:• “3. 128 Mb Platform Flash XL,” page 20• “4. 32 MB Linear BPI Flash,” page 20• “5. System ACE CF and CompactFlash Connector”• “6. USB JTAG,” page 26For more information, see the Virtex-6 FPGA Configuration User Guide athttp://www.xilinx.com/support/documentation/user_guides/ug360.pdf.With the mode set to JTAG 101, the ML605 will not attempt to boot or load a bitstreamfrom either of the Flash devices. If a CompactFlash (CF) card is installed in the CF socketU73, System ACE CF will attempt to load a bitstream from the CF card image addresspointed to by the image select switch S1. With no CF card present, the ML605 can beconfigured via the onboard JTAG controller and USB download cable as described above.With the mode set to either Slave SelectMAP 110, or BPI Mode 010, the FPGA will attemptto configure itself from the selected Flash device as described in “3. 128 Mb Platform FlashXL,” page 20.Note: S1 switch 4 is the System ACE controller enable switch. When ON, this switch allows theSystem ACE to boot at power-on if it finds a CF card present. In order to boot from BPI Flash U4 orXilinx Platform Flash (U27) without System ACE contention, S1 switch 4 must be OFF.Table 1-32: Mode Switch S2 SettingsMode Pins (M2,M1,M0) Configuration Mode110 Slave SelectMAP010 BPI Mode101 JTAG |
Related manuals for Xilinx Virtex-6 FPGA
This manual is suitable for:
manualsdatabase
Your AI-powered manual search engine