Xilinx SP701 User Manual

Also see for SP701: Software Install and Board Setup

Contents

Chapter 1IntroductionOverviewThe SP701 evaluation board is based on the XC7S100FGGA676 device, a member of the Xilinx®7 series FPGA family. It is optimized for low cost, low power, and high I/O performance. It comeswith advanced high-performance FPGA logic based on real6-input look up table (LUT), 36 Kbdual-port block RAM, support for DDR3L interface up to 1866 Mb/s, XADC with 12-bit1 MSPA ADC with on-chip thermal and supply sensors, and powerful clock management tiles(CMTs). The board is designed for high-performance and lower power with a 28 nm, 1V corevoltage process. For lower power, it has a 0.9V core voltage option.Table 1: XC7S100 ResourcesSpartan®-7 FPGAResources Component FeaturesLogic Resources Part Number XCS7100Logic Cells 102,400Slices 16,000CLB Flip-flops 128,000Memory Resources Max. Distributed RAM (Kb) 1,100Block RAM/FIFO w/EEC (36 Kb each) 120Total Block RAM (Kb) 4,320Clock Resources Clock Mgmt. Tiles (1 MMCM + 1 PLL) 8I/O Resources Max. Single-Ended I/O Pins 400Max. Differential I/O Pins 192Embedded Hard IPResourcesDSP Slices 160Analog Mixed Signal (AMS)/XADC 1Configuration AES/HMAC Blocks 1Speed Grades Commercial Temp (C) -1, -2Industrial Temp (I) -1, -2, -1LExpanded Temp (Q) -1Package Body Area (mm) Ball Pitch (mm) Available User I/O:3.3V SelectIO™technology HR I/OFGGA676 27 x 27 1.0 400Chapter 1: IntroductionUG1319 (v1.0) July 12, 2019 www.xilinx.comSP701 Board User Guide 4Send Feedback