Xilinx VC709 User Manual

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Xilinx VC709 User Manual Manual pdf 42 page image

42 www.xilinx.com VC709 Evaluation BoardUG887 (v1.2.1) March 11, 2014Chapter 1: VC709 Evaluation Board FeaturesNote: The six control/status signals to/from each SFP+ connector are routed through a level shifter.USB-to-UART Bridge[Figure 1-2, callout 13]The VC709 board contains a Silicon Labs CP2103GM USB-to-UART bridge device (U44)which allows a connection to a host computer with a USB port. The USB cable is suppliedin the VC709 evaluation kit (type-A end to host computer, type mini-B end to VC709 boardconnector J17). The CP2103GM is powered by the USB 5V provided by the host PC whenthe USB cable is plugged into the USB port on the VC709 board.Xilinx UART IP is expected to be implemented in the FPGA fabric. The FPGA supports theUSB-to-UART bridge using four signal pins: Transmit (TX), Receive (RX), Request to Send(RTS), and Clear to Send (CTS).Silicon Labs provides royalty-free Virtual COM Port (VCP) drivers for the host computer.These drivers permit the CP2103GM USB-to-UART bridge to appear as a COM port tocommunications application software (for example, TeraTerm or HyperTerm) that runs onthe host computer. The VCP device drivers must be installed on the host PC prior toestablishing communications with the VC709 board.The USB Connector pin assignments and signal definitions between J17 and U44 are listedin Table 1-15.SFP+ Module 3 (P4)AA41 SFP3_TX_FAULT 2 TX_FAULTAC39 SFP3_MOD_DETECT 6 MOD_ABSAD42 SFP3_RS0 7 RS0AE42 SFP3_RS1 9 RS1AD38 SFP3_LOS 8 LOSAC38 SFP3_TX_DISABLE 3 TX_DISABLESFP+ Module 4 (P5)AE38 SFP4_TX_FAULT 2 TX_FAULTAC41 SFP4_MOD_DETECT 6 MOD_ABSAE39 SFP4_RS0 7 RS0AE40 SFP4_RS1 9 RS1AD40 SFP4_LOS 8 LOSAC40 SFP4_TX_DISABLE 3 TX_DISABLETable 1-14: SFP+ Module Control and Status (Cont’d)XCVX690T (U1) Pin Net Name SFP+ ModulePin Number Pin Name