Xilinx virtex-5 fpga User Manual

Also see for Virtex-5 FPGA ML561: User guide User guide User guide User guide User guide

Contents

Virtex-5 FPGA GTP Transceiver SIS Kit (IBIS-AMI) www.xilinx.com 15UG587 (v1.1) June 21, 2012Appendix AHSPICE and Quantum ChannelDesigner/IBIS-AMI Correlation ResultsThis appendix describes the correlation of the IBIS-AMI models for Virtex®-5 FPGA GTPtransceivers with the HSPICE models. Simulation results are presented for a range ofsimulation cases and operating corners.Transmitter CorrelationThis section outlines the correlation methodology and gives a summary of correlationresults.Correlation MethodologyThe IBIS-AMI (analog and algorithmic) model was simulated into several different loads toverify output voltage, edge rate, equalization, and reflection behavior. These loadsconsisted of a 6-inch wline with three different impedances, terminated into an idealdifferential impedance of 100 . Three differential wline impedances were used:• 100 (ideal match)• 50 (overloaded driver)• 150 (underloaded driver)A comprehensive set of correlation results include:• Eight power levels (0 mV, 400 mV, 600 mV, 800 mV, 900 mV, 1,000 mV, 1,050 mV and1,100 mV)• Eight equalization settings ranging from 0%–52% de-emphasis• Three operating corners:• Slow (SS)• Typical (TT)• Fast (FF)• Three test conditions (50 , 100 , and 150 transmission lines)A more comprehensive subset of correlation results include:• Three power levels (400 mV, 800 mV, and 1,100 mV)• Three equalization settings (0%, 18.5%, and 52% de-emphasis)• Three operating corners:• Slow (SS)