Xilinx virtex-5 fpga User Manual
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26 www.xilinx.com Virtex-5 FPGA GTP Transceiver SIS Kit (IBIS-AMI)UG587 (v1.1) June 21, 2012Appendix A: HSPICE and Quantum Channel Designer/IBIS-AMI Correlation ResultsX-Ref Target - Figure A-17Figure A-17: Ideal Voltage Source, 4 Input Voltage Swings, Bias Mode = 1, ReceiveEqualization = 0, FFX-Ref Target - Figure A-18Figure A-18: Ideal Voltage Source, 4 Input Voltage Swings, Bias Mode = 2, ReceiveEqualization = 0, FFUG587_aA_17_02181017.0 18.0 19.016.0Time (ns)Volts (mV)Red = QCD Blue = HSPICE100.0-100.0-200.00.0200.0300.0400.0UG587_aA_18_02181017.0 18.0 19.016.015.0Time (ns)Volts (mV)Red = QCD Blue = HSPICE100.0-100.0-200.00.0200.0300.0 |
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