National Instruments AI-16XE-10 manuals
AI-16XE-10
Table of contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- General Characteristics
- Functional Overview
- Figure 2-2. PCI-MIO-16XE-10, PCI-6052E, and PCI-6031E Block Diagram
- Figure 2-3. PCI-6023E, PCI-6024E, and PCI-6025E Block Diagram
- Figure 2-4. PCI-6032E and PCI-6033E Block Diagram
- Figure 2-5. PCI-MIO-16XE-50 Block Diagram
- PCI Interface Circuitry
- Analog Input and Timing Circuitry
- Analog Input Circuitry
- Table 2-1. PGIA Gain Set Verses Board
- Single-Read Timing
- Data Acquisition Sequence Timing
- Figure 2-9. Timing of Scan in Example 1
- Figure 2-10. Multirate Scanning of Two Channels
- Figure 2-12. Multirate Scanning of Two Channels with 3:1:1 Sampling Rate
- Figure 2-14. Multirate Scanning without Ghost
- Posttrigger and Pretrigger Acquisition
- Analog Triggering
- Analog Output and Timing Circuitry
- Analog Output Circuitry
- Single-Point Output
- Waveform Generation
- Digital I/O Circuitry
- RTSI Bus Interface Circuitry
- Figure 2-19. RTSI Bus Interface Circuitry Block Diagram
- Register Map
- Table 3-1. PCI E Series Register Map
- Register Sizes
- Misc Command Register
- Status Register
- Analog Input Register Group
- ADC FIFO Data Register
- Configuration Memory Low Register
- Table 3-3. PGIA Gain Selection
- Configuration Memory High Register
- Table 3-4. Calibration Channel Assignments
- Table 3-5. Differential Channel Assignments
- Table 3-7. Referenced Single-Ended Channel Assignments
- Analog Output Register Group
- AO Configuration Register
- DAC FIFO Data Register
- DAC0 Direct Data Register
- DAC1 Direct Data Register
- DMA Control Register Group
- AI AO Select Register
- G0 G1 Select Register
- DAQ-STC Register Group
- PCl Local Bus
- PCI Initialization for the IBM Compatible System
- Re-mapping the PCI E Series Board
- PCI Initialization for the Macintosh
- Windowing Registers
- Digital I/O
- Analog Input
- Example 1
- Example 2
- Example 3
- Example Program
- Example 4
- Programming the MITE for Different DMA Transfers
- Example 5
- Example 6
- Example 7
- Example 8
- Example 9
- Analog Output
- General-Purpose Counter/Timer
- RTSI Trigger Lines Programming Considerations
- Figure 4-1. Analog Trigger Structure
- Interrupt Programming
- DMA Programming
- The Link Chaining Mode for DMA Transfer
- Figure 4-3. DMA Link Chaining Mode Structure
- About the EEPROM
- Figure 5-1. EEPROM Read Timing
- Table 5-1. PCI-MIO-16E-1, PCI-MIO-16E-4, PCI-6071E EEPROM Map
- Table 5-2. PCI-MIO-16XE-50 EEPROM Map
- Table 5-3. PCI-MIO-16XE-10, PCI-6031E, PCI-6032E and PCI-6033E EEPROM Map
- Table 5-4. PCI-6023E EEPROM Map
- Table 5-5. PCI-6024E and PCI-6025E EEPROM Map
- Table 5-6. PCI-6052E EEPROM Map
- Calibration DACs
- Figure 5-2. Calibration AC Write Timing
- NI-DAQ Calibration Function
Related products
AI-64XE-10PCI-MIO-16XE-10PCI-MIO-16XE-50MIO-64XE-10FieldPoint FP-AI-100FieldPoint cFP-AI-100PC-TIO-10AT-MIO-16AT-MIO-16DFieldPoint FP-AI-112National Instruments categories
I/O Systems
Control Unit
Computer Hardware
Controller
Measuring Instruments
PCI Card
Data Loggers
Network Hardware
Test Equipment
Recording Equipment
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