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NEC PD17062 manuals

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PD17062

Brand: NEC | Category: Controller
Table of contents
  1. PWM
  2. Table Of Contents
  3. Table Of Contents
  4. Table Of Contents
  5. Table Of Contents
  6. Table Of Contents
  7. Table Of Contents
  8. Table Of Contents
  9. PIN FUNCTIONS
  10. EQUIVALENT CIRCUITS OF THE PINS
  11. PROGRAM MEMORY (ROM)
  12. FUNCTIONS OF PROGRAM MEMORY
  13. BRANCHING A PROGRAM
  14. TABLE REFERENCE
  15. PROGRAM COUNTER (PC)
  16. STACK
  17. ADDRESS STACK REGISTERS (ASRs)
  18. DATA MEMORY (RAM)
  19. FUNCTIONS OF DATA MEMORY
  20. NOTES ON USING DATA MEMORY
  21. GENERAL-PURPOSE REGISTER (GR)
  22. ADDRESS GENERATION FOR GENERAL-PURPOSE REGISTER AND DATA MEMORY IN INDIVIDUAL INSTRUCTIONS
  23. NOTES ON USING THE GENERAL-PURPOSE REGISTER
  24. ARITHMETIC LOGIC UNIT (ALU) BLOCK
  25. CONFIGURATION AND FUNCTIONS OF THE COMPONENTS OF THE ALU BLOCK
  26. NOTES ON USING THE ALU
  27. SYSTEM REGISTER (SYSREG)
  28. ADDRESS REGISTER (AR)
  29. BANK REGISTER (BANK)
  30. INDEX REGISTER (IX) AND DATA MEMORY ROW ADDRESS POINTER (MP)
  31. GENERAL-PURPOSE REGISTER POINTER (RP)
  32. REGISTER FILE (RF)
  33. IDCDMAEN (00H, b 1 )
  34. SERIAL INTERFACE MODE REGISTER (08H)
  35. BTM0MD (09H)
  36. HORIZONTAL SYNCHRONIZING SIGNAL COUNTER CONTROL (11H, 12H)
  37. PLL REFERENCE MODE SELECTION REGISTER (13H)
  38. TIMER CARRY (17H)
  39. A/D CONVERTOR CONTROL (21H)
  40. PORT1C I/O SETTING (27H)
  41. INTERRUPT PERMISSION FLAG (2FH)
  42. IDCEN (31H)
  43. P1BBIOn (35H)
  44. P0ABIOn (37H)
  45. SHIFT CLOCK FREQUENCY SETTING (39H)
  46. DATA BUFFER (DBF)
  47. FUNCTIONS OF DATA BUFFER
  48. DATA BUFFER AND TABLE REFERENCING
  49. DATA BUFFER AND PERIPHERAL HARDWARE
  50. DATA BUFFER AND PERIPHERAL REGISTERS
  51. PRECAUTIONS WHEN USING DATA BUFFERS
  52. INTERRUPT BLOCK CONFIGURATION
  53. INTERRUPT FUNCTION
  54. INTERRUPT ACCEPTANCE
  55. OPERATIONS AFTER INTERRUPT ACCEPTANCE
  56. INTERRUPT PROCESSING ROUTINE
  57. INTERNAL INTERRUPT (TIMER, SERIAL INTERFACE)
  58. MULTIPLE INTERRUPTS
  59. TIMER CONFIGURATION
  60. TIMER FUNCTIONS
  61. TIMER CARRY FLIP-FLOP (TIMER CARRY FF)
  62. CAUTIONS IN USING THE TIMER CARRY FF
  63. TIMER INTERRUPT
  64. CAUTIONS IN USING THE TIMER INTERRUPT
  65. STANDBY BLOCK CONFIGURATION
  66. STANDBY FUNCTION
  67. DEVICE OPERATION MODE SPECIFIED AT THE CE PIN
  68. HALT FUNCTION
  69. CLOCK STOP FUNCTION
  70. OPERATION OF THE DEVICE AT A HALT OR CLOCK STOP
  71. RESET BLOCK CONFIGURATION
  72. RESET FUNCTION
  73. CE RESET
  74. POWER-ON RESET
  75. RELATIONSHIP BETWEEN CE RESET AND POWER-ON RESET
  76. POWER FAILURE DETECTION
  77. CONFIGURATION AND CLASSIFICATION OF GENERAL-PURPOSE PORT
  78. FUNCTIONS OF GENERAL-PURPOSE PORTS
  79. GENERAL-PURPOSE I/O PORTS (P0A, P0B, P1B, P1C)
  80. GENERAL-PURPOSE INPUT PORT (P0D)
  81. GENERAL-PURPOSE OUTPUT PORTS (P0C, P1A)
  82. SERIAL INTERFACE MODE REGISTER
  83. CLOCK COUNTER
  84. STATUS REGISTER
  85. WAIT REGISTER
  86. PRESETTABLE SHIFT REGISTER (PSR)
  87. SERIAL INTERFACE INTERRUPT SOURCE REGISTER (SIO0IMD)
  88. SHIFT CLOCK FREQUENCY REGISTER (SIO0CK)
  89. PWM PINS
  90. PLL FREQUENCY SYNTHESIZER CONFIGURATION
  91. OVERVIEW OF EACH PLL FREQUENCY SYNTHESIZER BLOCK
  92. PROGRAMMABLE DIVIDER (PD) AND PLL MODE SELECT REGISTER
  93. REFERENCE FREQUENCY GENERATOR (RFG)
  94. PHASE COMPARATOR ( -DET), CHARGE PUMP, AND UNLOCK DETECTION BLOCK
  95. PLL DISABLE MODE
  96. SETTING DATA FOR THE PLL FREQUENCY SYNTHESIZER
  97. PRINCIPLE OF OPERATION
  98. D/A CONVERTER CONFIGURATION
  99. REFERENCE VOLTAGE SETTING REGISTER (ADCR)
  100. ADC PIN SELECT REGISTER (ADCCHn)
  101. EXAMPLE OF A/D CONVERSION PROGRAM
  102. SPECIFICATION OVERVIEW AND RESTRICTIONS
  103. DIRECT MEMORY ACCESS
  104. IDC ENABLE FLAG
  105. VRAM
  106. CHARACTER ROM
  107. BLANK, R, G, AND B PINS
  108. SPECIFYING THE DISPLAY START POSITION
  109. SAMPLE PROGRAMS
  110. HORIZONTAL SYNC SIGNAL COUNTER CONFIGURATION
  111. GATE CONTROL REGISTER (HSCGT)
  112. HSYNC COUNTER (HSC)
  113. OUTLINE OF INSTRUCTION SETS
  114. INSTRUCTIONS
  115. LIST OF INSTRUCTION SETS
  116. BUILT-IN MACRO INSTRUCTIONS
  117. RESERVED SYMBOLS FOR ASSEMBLER
  118. PORT REGISTER
  119. REGISTER FILES
  120. PERIPHERAL HARDWARE REGISTER
  121. ELECTRICAL CHARACTERISTICS
  122. PACKAGE DRAWINGS
  123. RECOMMENDED SOLDERING CONDITIONS
  124. APPENDIX DEVELOPMENT TOOLS
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