ADTRAN DDS-DP Installation And Maintenance Manual

Contents

ADTRAN DDS-DP Installation And Maintenance Manual Manual pdf 2 page image

2 61433105L2-5DSection 61433105L2, Issue 4capability that maintains data integrity across the carrierfacility. For subrate and 19.2 kbps rates, error correctionand data transmission is accomplished over a single DS0time slot using a Majority Vote Error Correction(MVEC) algorithm. For error correction at these rates,MVEC must be selected in the BCU via the SLC Series 5CIU.For rates of 56 and 64 kbps, error correction requires oneadditional DS0 time slot for the error correcting paritybyte. The Series 5 Total Reach DDS-DP only allowsSCEC, the parity byte error correction scheme, at 56 and64 kbps. When error correction is desired for 19.2 kbpsservice, provision 9.6 kbps and MVEC via the CIU andselect 19.2 on SW2.Series 5 Total Reach DDS-DP may interoperate overthe carrier system with another Total Reach DDS-DP,OCU DP, DS0 DP, 1/0 DCS, or switch and may belocated in an end office, hub office, intermediateoffice, or Digital Loop Carrier (Figure 2). The2-wire loop is connected using the odd pair Tip (pin31) and Ring (pin 32) on the Series 5 backplane.NOTEThe Series 5 Total Reach DDS-DP must beused with an appropriate Total Reach DDS-R unit.OptionsThe Series 5 Total Reach DDS-DP is provisionedthrough the SLC Series 5 system and an on-board DIPswitch. SW2 provides feature options not availablethrough the SLC Series 5 channel bank intelligentsystem. Use the SLC Series 5 Craft Interface Unit (CIU)to provision intelligent channel bank features supportedby the Series 5 Total Reach DDS-DP. See Figure 3and Table 1 for option description and provisioning.NOTESelect OCU DP, CLEI 5SCU48, whenprovisioning via the CIU.Error CorrectionWhen error correction is enabled the Series 5 Total ReachDDS-DP provides an error detection and correctionTable 1. Option SettingsUCB5seireSaivgninoisivorPerawtfoSnoitcnuF noitpircseDetaR spbk65ro,6.9,8.4,4.2tceleSnoitcerroCrorrE)CE(:tceles,2.91hguorht4.2sietarfIelbaliavatonCECS(ENONroCEVM).dracsihtnosetaresehtta:tceles,spbk46hguorht65sietarfItaA/NsiCEVM(ENONroCECS).setareseht)CZ(edoCoreZ oNroseYyradnoceS)CS(lennahCoNroseY2WShctiwSpiDaivgninoisivorPerawdraHK46 )K46(1-2WSlennahCraelCspbk46stcelesNOK2.91 1 )K2.91(2-2WSetarpool2.91stcelesNO65dehctiwS )65WS(3-2WS65dehctiwSselbaneNO65dehctiwSselbasidFFOgnilangiSB/A )GISBA(4-2WSehtfoetatsehtsenimretedtinuehtNOslangisgnisustibgnilangisBdnaA.enalpkcabknablennahcehtnotneserpmorfgnilangisseviredtinuehtFFO.maertsatadgnimmocniehtrotinoMytilauQ )MQ(5-2WSMQselbaneNOMQselbasidFFO1 dna2WSno2.91tcelesnoitcerroCrorrEspbk2.91roF.UIC5seireSCLShtiwCEVM6.9elbaneFigure 2. Total Reach DDS Circuit DiagramT-CarrierSLCSERIES 5DLC2-Wire Loop4-Wire CustomerInterfaceDSU/CSUTRDDS-RDDS-DPT/R PairCustomer PremisesTRFigure 3. Option SwitchSW2 64K19.2KSW56ABSIGQM1ON2 3 4 5