2: M ODULE S PECIFICATIONSFC5A MicroSmart User’s Manual FC9Y-B1268 2-55Analog I/O ModulesAnalog I/O modules are available in 3-I/O types, 2-, 4-, and 8-input types, and 1-, 2- and 4-output types. The input chan-nel can accept voltage and current signals, thermocouple and resistance thermometer signals, or thermistor signals. Theoutput channel generates voltage and current signals.Analog I/O Module Type NumbersName I/O Signal I/O Points Category Type No.Analog I/O ModuleVoltage (0 to 10V DC)Current (4 to 20mA) 2 inputsEND Refresh TypeFC4A-L03A1Voltage (0 to 10V DC)Current (4 to 20mA) 1 outputThermocouple (K, J, T)Resistance thermometer (Pt100) 2 inputsFC4A-L03AP1Voltage (0 to 10V DC)Current (4 to 20mA) 1 outputAnalog Input ModuleVoltage (0 to 10V DC)Current (4 to 20mA) 2 inputs FC4A-J2A1Voltage (0 to 10V DC)Current (4 to 20mA)Thermocouple (K, J, T)Resistance thermometer (Pt100, Pt1000, Ni100, Ni1000)4 inputsLadder Refresh TypeFC4A-J4CN1Voltage (0 to 10V DC)Current (4 to 20mA) 8 inputs FC4A-J8C1Thermistor (NTC, PTC) 8 inputs FC4A-J8AT1Analog Output ModuleVoltage (0 to 10V DC)Current (4 to 20mA) 1 output END Refresh Type FC4A-K1A1Voltage (–10 to +10V DC)Current (4 to 20mA) 2 outputsLadder Refresh TypeFC4A-K2C1Voltage (0 to 10V DC)Current (4 to 20mA) 4 outputs FC4A-K4A1END Refresh Type and Ladder Refresh TypeDepending on the internal circuit design for data refreshing, analog I/O modules are categorized into two types.END Refresh TypeEach END refresh type analog I/O module is allocated 20 data registers to store analog I/O data and parameters for controlling ana-log I/O operation. These data registers are updated at every end processing while the CPU module is running. WindLDR has ANSTmacro to program the analog I/O modules.The CPU module checks the analog I/O configuration only once at the end processing in the first scan. If you have changed theparameter while the CPU is running, stop and restart the CPU to enable the new parameter.Ladder Refresh TypeEach ladder refresh type analog I/O module can be allocated any data registers to store analog I/O data and parameters for control-ling analog I/O operation. The data registers are programmed in the ANST macro. Analog I/O data are updated at the ladder stepfollowing the ANST macro. Analog I/O parameters are updated when the ANST macro is executed, so analog I/O parameters can bechanged while the CPU is running.Analog I/O Module Category END Refresh Type Ladder Refresh TypeWhile CPUis runningParameter Refreshing At the end processing in the first scan When executing ANST macroAnalog I/O Data Refreshing At the end processingIn the step after ANST macro(always refreshed whether input to ANST is on oroff)While CPUis stoppedAnalog Output DataRefreshingWhen M8025 (maintain outputs while CPUstopped) is on, output data is refreshed. Whenoff, output is turned off.Maintains output status when the CPU is stopped.Output data can be changed using STPA instructionwhile the CPU is stopped. See page 9-22.Data Register Allocation By default Optionally designated in ANST macroPhone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com
