Lumel ND30IoT User Manual

ND30IoT-09A 72 User's manualStatus 3 Register – (address 4417, R): Files archive statusBit 15 – Ethernet connectedBit 14 – reservedBit 13 – reservedBit 12 – reservedBit 11 – "0” - waiting for the archiving conditions to be met"1” - archiving in the archiving group 2Bit 10 – "0” - waiting for the archiving conditions to be met"1” - archiving in the archiving group 1Bit 9 – reservedBit 8 – Archiving group 2 enabledBit 7 – Archiving group 1 enabledBit 6 – reservedBit 5 – copying of internal memory tofiles archive from archiving group 2Bit 4 – copying of internal memory tofiles archive from archiving group 1Bit 3 – Files archive space is full, (less then14 days at 1 sec. interval to completely usea the files archive space)Bit 2 – 70% of files archive space is fullBit 1 – Files archive initialized correctlyBit 0 – Files archive file system errorStatus 4 Register – (address 4418, R) reactive power characteristics:Bit 15 – measurement with phase L3synchronizationBit 14 – measurement with phase L2synchronizationBit 13 – measurement with phase L1synchronizationBit 12 – measurement with currentsynchronizationBit 11 – "1” – capacity 3L max.Bit 10 – "1” – capacity 3L min.Bit 9 – "1” – capacity 3LBit 8 – "1” – leading L3 max.Bit 7 – "1” – capacity L3 min.Bit 6 – "1” – capacity L3Bit 5 – "1” – capacity L2 max.Bit 4 – "1” – capacity L2 min.Bit 3 – "1” – capacity L2Bit 2 – "1” – capacity L1 max.Bit 1 – "1” – capacity L1 min.Bit 0 – "1” – capacity L1Status 5 Register – (address 4419, R)Bit 8 – "1” – alarm 1 condition 3 for phase L3 activeBit 7 – "1” – alarm 1 condition 3 for phase L2 activeBit 6 – "1” – alarm 1 condition 3 for phase L1 activeBit 5 – "1” – alarm 1 condition 2 for phase L3 activeBit 4 – "1” – alarm 1 condition 2 for phase L2 activeBit 3 – "1” – alarm 1 condition 2 for phase L1 activeBit 2 – "1” – alarm 1 condition 1 for phase L3 activeBit 1 – "1” – alarm 1 condition 1 for phase L2 activeBit 0 – "1” – alarm 1 condition 1 for phase L1 activeStatus 6 Register – (address 4420, R)Bit 8 – "1” – alarm 2 condition 3 for phase L3 activeBit 7 – "1” – alarm 2 condition 3 for phase L2 activeBit 6 – "1” – alarm 2 condition 3 for phase L1 activeBit 5 – "1” – alarm 2 condition 2 for phase L3 activeBit 4 – "1” – alarm 2 condition 2 for phase L2 activeBit 3 – "1” – alarm 2 condition 2 for phase L1 activeBit 2 – "1” – alarm 2 condition 1 for phase L3 activeBit 1 – "1” – alarm 2 condition 1 for phase L2 activeBit 0 – "1” – alarm 2 condition 1 for phase L1 activeStatus 7 Register – (address 4424, R)Bit 15 – “1” - presence of binary inputsBit 14 – reservedBit 13 – reservedBit 12 – reservedBit 11 – reserved