Distributor of NXP Semiconductors: Excellent Integrated System LimitedDatasheet of MCIMX53SMD - TABLET SABRE PLATFORM MCIMX53Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com36 MCIMX53SMD Board Hardware User’s Guide, Rev. 0 Freescale SemiconductorThe logic levels on 24 different pins that are designated for boot mode configurationsInternal eFUSE settingsA serial downloader (USB/UART)There are two dedicated BOOT_MODE pins in the i.MX53 processor that specify where the processor shouldfind its boot information. Table 5-4 shows the settings of BOOT_MODE pins for each of these methods.Developers should remember that these two pins are tied to the NVCC_RESET modules, and therefore, on theMCIMX53SMD board, they use a 1.8V logic level (unlike the Boot Configuration pins that use a 3.3V logiclevel). The default boot selection for the MCIMX53SMD board is 00 – Boot from hardware settings. Thesettings of the BOOT_MODE pins can be changed by using the optional DIP switches, SW28.3 and SW28.4. It isless likely that developers want to boot the processor from eFUSEs as eFUSEs may get damaged during theboot process. Developers can use the serial downloader method to boot the processor by turning both the DIPswitches to ON.BOOT_MODE1 BOOT_MODE0 Boot Selection0 0 Boot from hardware settings0 1 Reserved1 0 Boot from eFUSE settings1 1 Use serial downloaderTable 5-4. BOOT_MODE Pin SettingsIf hardware settings are used to boot the processor, then, i.MX53 pins are sampled at the beginning of theboot process. These pins are explained in Table 5-5A and Table 5-5B, along with their default setting on theMCIMX53SMD board. Note that three bits in the BOOT_CFG words do not have corresponding pins to read.The MCIMX53SMD board supports four types of boot sources: SPI NOR, SD Card (eSDHC1), eMMC4.4(eSDHC3), and SSD SATA. So, we only keep the relative configure pins for the boot source.BOOT_CFG2[5]BOOT_CFG2[6]BOOT_CFG2[7]BOOT_CFG1[3]BOOT_CFG1[4]BOOT_CFG1[5]BOOT_CFG1[6]PIN EIM_DA0 EIM_EB1 EIM_EB0 EIM_A18 EIM_A19 EIM_A20 EIM_A21Default 0 0 0 0 0 0 0SW26 1 2 3 4 5 6 7Table 5-5A. BOOT_CFG Word1BOOT_CFG3[5]BOOT_CFG3[4]BOOT_CFG3[3]BOOT_CFG2[2]PIN EIM_DA6 EIM_DA7 EIM_DA8 EIM_DA9Default 0 0 1 1SW28 1 2 3 4Table 5-5B. BOOT_CFG Word2The four pins that determine where bootable code is stored are BOOT_CFG1[6:3]. Depending on which bootsource is selected, some of these pins may have different meanings. Those pins will show up as an ‘X’ for logiclevel. The specific logic levels and their meanings are as follows:BOOT_CFG1[6:3] Boot Code Source Selection010X - PATA/SATA Boot