NXP Semiconductors Freescale MCIMX53SMD Hardware User's Manual

Distributor of NXP Semiconductors: Excellent Integrated System LimitedDatasheet of MCIMX53SMD - TABLET SABRE PLATFORM MCIMX53Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.comFreescale Semiconductor MCIMX53SMD Board Hardware User’s Guide, Rev. 0 47signal is only sent to the Ethernet PHY. The two control traces from the i.MX53 processor to the Ethernet PHYare: an active low interrupt trace (FEC_nINT) and an active low reset line (FEC_nRST). When the PHY comesout of reset, it is internally programmed to establish communications with an attached Ethernet device and isready to correctly format all communications being transmitted or received by the processor. Ifcommunications become unreliable, the processor can restart the PHY by forcing it into reset.The PHY is connected to debug connector (J127) through a magnetic device. It has two pairs of differentialtraces for receive and transmit. The differential pair traces are biased externally with 49.9 1%Ω pull-upresistors. When initially connected to another Ethernet device, the PHY will negotiate to determine if it isconnected to a switch type device or another Ethernet end device, and will reconfigure the Transmit andReceive inputs to correctly match the device attached. This eliminates the need for cross-over cables whendirectly connecting to another Ethernet end device. The LED status indicators are driven by the PHY to show aconnected link and activity on the link. It is important to note that the LED control lines from the PHY alsoserve as PHY feature selection options. At boot time, the LED1 control pin determines whether the 1.2Vinternal regulator should be turned ON or OFF, and the LED2 control pins determines whether the PHY acceptsan external reference clock or internally generates the clock signal and outputs it to the processor forreference. See the LAN8720 data sheet for more details.5.13. USB PHY ConnectionsThe i.MX53 processor has two internal USB PHY: one for USB HOST and other for USB OTG. The USB OTGconnected to the MCIMX53SMD board signals with micro-B USB connector directly. For the USB HOST, it isconnected with a USB-HUB, USB2514, from SMSC. The SMSC 4-Port HUB is low power, OEM configurable, MTThub controller IC with four downstream ports for embedded USB solutions.The 4-port hub is fully compliant with the USB2.0 Specification and will attach to an upstream port as a Full-Speed Hub or as a Full-/High-Speed Hub. The 4-Port Hub supports Low-Speed, Full-Speed, and High-Speed (ifoperating as a High-Speed Hub) downstream devices on all the enabled downstream ports. Two of four USBports (Port1 and Port4) are dedicated to USB HOST Connector. Port2 is dedicated to 3G Modem on theMCIMX53SMD board and Port3 is for VGA Dock connector. The MCIMX53SMD board uses a USB power switchfor Port1 and Port4. Each one can provide 500 mA current, and over current interrupt will occur when highcurrent happened. Meanwhile, we use the same chip for USB OTG.5.14. SATAThe internal SATA PHY of the i.MX53 processor provides the two differential pair data signals necessary forSATA operations. No external transceiver is required. Each of the four data lines pass through a 0.01 μFcapacitor for decoupling. These capacitors are placed as close to the SATA connector as possible. TheProcessor SATA module receives 2.5V power from VBUCKPERI for the PHY portion of the module and 1.3Vpower from VLDO5_1V3 for the controller portion of the module. A 191Ω 1% resistor must be connected tothe SATA_REXT pin (C13). This resistor received a small, constant current at the initialization of the SATAmodule to allow cable impedance calibration. This resistor is not required after module initialization.The i.MX53 processor provides two pins to receive an external differential pair clock input to be used by theSATA module. Testing of the i.MX53 processor confirms that the internally generated clock signal is workingproperly. Therefore, the external clock components are not populated and the eFUSEs for the processor areconfigured for internal clock operation.The SATA connector is suitable to be used with all SATA capable storage media devices, including Hard Drivesand Optical Media storage devices (DVD/CD). We use SSD SATA on the MCIMX53SMD board, by default. It ispossible to configure the MCIMX53SMD board to boot directly from a SATA device. To enable theMCIMX53SMD board to boot from SATA, the developer needs to set SW26 to 01010000.