Chapter 4 Signal Connections©National Instruments Corporation4-25PCI-6023E/6024E/6025E User Manual2. Using the following formula, calculate the largest possible load tomaintain a logic low level of 0.4 V and supply the maximum drivingcurrent:V = I * R L ⇒ R L = V/I, where:V = 0.4 V ; Voltage across R LI = 46 μA + 10 μA ; 4.6 V across the 100 kΩ pull-up resistorand 10 μA maximum leakage currentTherefore:R L = 7.1 kΩ ; 0.4 V/56 μAThis resistor value, 7.1 kΩ, provides a maximum of 0.4 V on the DIO lineat power up. You can substitute smaller resistor values to lower the voltageor to provide a margin for V cc variations and other factors. However,smaller values will draw more current, leaving less drive current for othercircuitry connected to this line. The 7.1 kΩ resistor reduces the amount oflogic high source current by 0.4 mA with a 2.8 V output.Timing Specifications♦ (PCI-6025E Only)This section lists the timing specifications for handshaking with yourPCI-6025E PC<0..7> lines. The handshaking lines STB* and IBFsynchronize input transfers. The handshaking lines OBF* and ACK*synchronize output transfers. Table 4-4 describes signals appearing in thehandshaking diagrams.Table 4-4. Signal Names Used in Timing DiagramsName Type DescriptionSTB* Input Strobe Input—A low signal on this handshaking line loads data intothe input latch.IBF Output Input Buffer Full—A high signal on this handshaking line indicatesthat data has been loaded into the input latch. A low signal indicatesthe board is ready for more data. This is an input acknowledgesignal.
