5-2 | ni.comChapter 5 CountersCounter Timing EngineUnlike analog input, analog output, digital input, and digital output, the cDAQ chassis countersdo not have the ability to divide down a timebase to produce an internal counter sample clock.For sample clocked operations, an external signal must be provided to supply a clock source. Thesource can be any of the following signals:• AI Sample Clock• AI Start Trigger• AI Reference Trigger• AO Sample Clock• DI Sample Clock• DI Start Trigger• DO Sample Clock• CTR n Internal Output• Freq Out• PFI• Change Detection Event• Analog Comparison EventNot all timed counter operations require a sample clock. For example, a simple buffered pulsewidth measurement latches in data on each edge of a pulse. For this measurement, the measuredsignal determines when data is latched in. These operations are referred to as implicit timedoperations. However, many of the same measurements can be clocked at an interval with asample clock. These are referred to as sample clocked operations. Table 5-1 shows the differentoptions for the different measurements.Table 5-1. Counter Timing MeasurementsMeasurementImplicitTiming SupportSample ClockedTiming SupportBuffered Edge Count No YesBuffered Pulse Width Yes YesBuffered Pulse Yes YesBuffered Semi-Period Yes NoBuffered Frequency Yes YesBuffered Period Yes Yes
