Nuvoton CODEC 8812 series User Manual

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Nuvoton CODEC 8812 series User Manual Manual pdf 30 page image

CODEC Motherboard Manual Version 1.3 Page 30 of 66 April 12, 2016CODEC Motherboard13.5 FS (Frame Sync)This is the pin name and bit name for the Frame Sync function. The FS rate is normally the sameas actual sampling rate intended for the device. However, FS is simply the rate at which samplesare transmitted over the I2S or PCM digital audio bus. It is not inherent in the device that theADC and DAC are actually also operating at the FS sample rate.The FS rate can be left as Default, or selected to be Custom. In either case, this section of thePLL Control features will set up the PLL to operate the ADC and DAC at the desired sample rate.If the device is set to be the bus master, then FS will be exactly the specified sample rate.If the device is in "slave" mode, best performance will be achieved when the FS signal is phaselocked with the ADC and DAC and operating at the same exact sampling rate. The defaultconfiguration for the PLL is to convert a 12.000MHz external MCLK into an internal 12.288MHzsignal for the internal IMCLK signal, which sets a 48.000kHz sample rate for both the ADC andDAC. The ADC and DAC always have the same sampling rate.13.6 Clock PrescalersChoosing the optimum prescale values and PLL coefficients is a complex process linked to thedetails of the configuration and desired operation of the end-product system. As an aid to thisprocess, the GUI Application can be asked to automatically determine the best PLL parameters.However, this needs to be checked against the instructions in the Design Guide, because theautomatic calculation may not guess correctly the entire desired configuration. As a further aid,the clock prescalers can be set to "Fixed" or "Auto." If set to "Auto,” the Calculate function willmake its best guess how to set the prescaler value. If set to "Fixed," the Calculate function willuse the prescaler value set in this control panel.13.7 Config PLLThis radio button causes all manually entered or automatically determined PLL parameters to beloaded into the PLL control registers. No change to the PLL control registers is made until thebutton is activated.