CODEC Motherboard Manual Version 1.3 Page 4 of 66 April 12, 2016CODEC Motherboard6.8.2.1. REFIMP ............................................................................................. 296.8.2.2. FS (Frame Sync) ................................................................................ 306.8.2.3. Clock Prescalers ................................................................................ 306.8.2.4. Config PLL ......................................................................................... 306.8.3. Digital Audio Control .............................................................................. 316.8.3.1. Clock Generation Control ................................................................... 316.8.3.1.1. CLKIOEN Master Mode ............................................................... 316.8.3.1.2. CLKM Master Clock ..................................................................... 326.8.3.1.3. BCLKSEL .................................................................................... 326.8.3.1.4. SMPLR Sample Rate ................................................................... 326.8.3.2. Companding Control .......................................................................... 326.8.3.2.1. PASSTHRU ................................................................................. 326.8.3.3. Audio Interface Control ....................................................................... 326.8.3.4. Jack Detect Bus Switching ................................................................. 326.9. Output Path Control Panel ............................................................................. 336.10. Register Map Control Panel ........................................................................... 346.10.1. Register Map Bit Control ........................................................................ 356.10.1.1. Register Map Update Bits (write-only bits) ...................................... 356.10.2. Audio Codec Register Control ................................................................ 356.11. Script Control Panel ....................................................................................... 366.11.1. Script Panel Structure ............................................................................ 366.11.2. Script Panel Syntax ................................................................................ 367. Daughter Card System .......................................................................................... 387.1. Changing Daughter Cards ............................................................................. 387.2. NAU8822 Daughter Card ............................................................................... 388. Jumpers and Connectors....................................................................................... 408.1. Power Related Connectors and Options ........................................................ 408.1.1. Summary of Power Options and Limits .................................................. 418.1.2. Main 5Vdc Power ................................................................................... 418.1.3. Power LINK Jumpers ............................................................................. 428.2. Analog Inputs for NAU8822 ........................................................................... 438.3. Analog Outputs for NAU8822......................................................................... 448.3.1. Analog Output Options for NAU8822...................................................... 458.3.1.1. Headphone Detect ............................................................................. 468.3.1.2. Headphone Virtual Ground ................................................................. 468.3.1.3. DC Coupled Headphone Outputs ....................................................... 468.3.1.4. Ear Speaker Mode ............................................................................. 46