Panasonic KX-TDE200GR Service Manual

Also see for KX-TDE200GR: Features guide

Contents

9KX-TDE200GR(1)(3)(5)(7)(8)(10)(12)(14)(16)(18)(20)(22)(23)(25)(27)(28)(30)(32)(33)(35)(37)(39)(41)(42)(43)(45)(46)(48)(49)(51)(53)(55)(56)(58)(60)(62)(63)(65)(66)(67)(2)(4)(6)(11)(13)(15)(17)(19)(21)(24)(26)(29)(31)(34)(36)(38)(40)(44)(47)(50)(52)(54)(57)(59)(61)(64)(9)EC_AD[0-15]EC_PAREC_nCBE1EC_nCBE0EC_nFRAMEEC_nPERREC_nSTOPEC_nTRDYEC_nINTEC_CLKEC_nCDETRINGERCT_NETAEFCT_D[0-7]DG+3.3VD+15VMASTER/nSM/nSPOWER_TYPE1POWER_TYPE0+3.3VDDG+2.5VD+3.3VD+3.3VD_B+3.3VD_BRS232_RTS2_CONRS232_CTS2_CONRS232_TXD2_CONRS232_RXD2_CONRS232_DTR2_CONRS232_DSR2_CON+15VSHELF_FAN_ALM_FPGADC_ALM_FPGALED_RUN_FPGA_DRIVEAC_ALM_FPGAnHALT_FPGAnFAN_ALM_FPGAnLOS_FPGAnBATT_FPGARINGER_SYNC_FPGALED_ALM_FPGA_DRIVECT_D[0]CT_C8CT_FRAMEnBUSYEX1_D[15]CLK_SD_33.33MHzSD0_nRESET_SOFTRS232_DCD2_CONCLK_32.768kHzRMT_nRESET_SOFT+15V_CON+3.3VD_BB+3.3VDDGDG+3.3VDEX1_A[1-7]HWCLK[1]CLKIO_66.66MHZ+1.8VD+1.25VD+1.2VDNEXUS_nRESET_SOFTSHW_FHSHW_CLKLUHW[1]LDHW[1]CH_SEL[3]CH_SEL[0]CH_SEL[1]MELODYSELMOHSELCH_SEL[5]+3.3VDDG+15VVREF_7.5VMu/nACH_SEL[7]CH_SEL[6]LUHW[0]LDHW[0]HW_CLK[0]SVM_DSP_OUT[1]SVM_DSP_OUT[0]VOX[0-3]CH_SEL[4]HWFHMEMORY_CARD_PRESNTRTC_nINTnBAT_ALMCL3162CL3164CL3144CL3172CL3160CL3180CL3169CL3159DGCL3173CL3166DGDGCL3146TP_DRAM_VREFCL3182CL3178CL3157CL3171CL3158CL3176CL3167CL3179DGCL3177CL3175TP_+1.2VDCL3168CL3143CL3174CL3170CL3165CL3163CL3181CL3161CL3149CL3148CL3152CL3151CL3145CL3147MAIN No.7+3.3VDCLK_SD_33.33MHzDGEX1_A[1-7]EX1_D[0-15]nDRRS232_nDCD2RS232_nDSR2RS232_nDTR2RS232_RXD2RS232_TXD2RS232_nCTS2RS232_nRTS2SD0_nINTSD0_WPSD0_CDnCS_SD0SD0_nRESET_SOFTnWE0SD0_DACKSD0_nDRQRS232_RTS2_CONRS232_TXD2_CONRS232_RXD2_CONRS232_CTS2_CONRS232_DTR2_CONRS232_DCD2_CONRS232_DSR2_CONMCCLKMCDATMCCMDTP_+1.25VDTP_+2.5VDTP_+3.3VDTP_+3.3VD_BTP_+15VDGCL3150CL3153CL3195CL3194CL3199CL3192CL3196CL3198CL3193CL3191CL3197CL3190CL3185CL3189CL3188CL3186CL3183CL3184CL3187CL3155CL3154TP_+15V_CONTP_+3.3VD_BBTP_+1.8VDMAIN No.10+3.3VDDGEC_AD[0-15]EC_PAREC_nCBE0EC_nCBE1EC_nRSTEC_nSTOPEC_nTRDYEC_nFRAMEEC_nPERREC_nINTEC_nCDETEC_CLK+15V_CONCT_FRAMECT_NETAEFCT_C8RINGERDC_ALM_FPGAAC_ALM_FPGARS232_RTS2_CONRS232_TXD2_CONRS232_RXD2_CONRS232_CTS2_CONRS232_DTR2_CONRS232_DCD2_CONRS232_DSR2_CON+3.3VD_BBSHW_CLKSHW_FHCT_D[0-7]M/nS_FPGALDHW[1]LUHW[1]nFAN_ALM_FPGALED_ALM_FPGALED_RUN_FPGAMASTER/nS_FPGAnBATT_FPGAPOWER_TYPE1_FPGAPOWER_TYPE0_FPGARINGER_SYNC_FPGAnHALT_FPGAnLOS_FPGASHELF_nFAN_ALM_FPGACL3202CL3201CL3200MAIN No.9+15V+3.3VDCH_SEL[0]DGHWCLK[0]LDHW[0]LUHW[0]MELODYSELMOHSELMu/nACH_SEL[1]VREF_7.5VDGCL3204CL3203MAIN No.8+3.3VDCLK_NEXUS_66MHzDGEX2_A[0-21]EX2_D[0-15]EX2_nDRHWCLK[0]LDHW[0]LUHW[0]nBSNEXUS_nINTSRAM_nBC1SRAM_nBC0SRAM_nWRnBACKnBREQSRAM_nCSnCS_NEXUSnBUSYnRESET_SOFTnWE1nWE0CH_SEL[0]MELODYSELMOHSELMu/nA+3.3VD_BEC_AD[0-15]EC_PAREC_nCBE0EC_nCBE1EC_nSTOPEC_nTRDYEC_nFRAMEEC_nPERREC_nINTEC_nCDETEC_CLKCT_D[0-7]CT_FRAMECT_NETAEFCT_C8RINGERnRESET_POWER LDHW[1]HWFHLUHW[1]CH_SEL[4]SHW_CLKSHW_FHPOWER_TYPE0POWER_TYPE1M/nSMASTER/nSHWCLK[1]CH_SEL[1]RMT_nRESET_SOFTCH_SEL[3]CH_SEL[5]CH_SEL[6]CH_SEL[7]VOX[0-3]nCS_SRAMMEMORY_CARD_PRESNTEXT_nINT0CL3207MAIN No.13+3.3VD+3.3VD_BDGnRESET_POWER+15V+3.3VD_BB+15V_CONHARD_nRESET_SW +1.25VD+1.2VD+2.5VDDRAM_VREF+1.8VDnBAT_ALMMAIN No.4CLKIO_66.66MHzCLK_SD_33.33MHzEX1_D[0-7]FAN_ALARM_nINTAC_ALARM_nINTDC_ALARM_nINTnRDnWE1nWE0nRDY_CPUnBUSY_NEXUSnCS_FPGACLK_32.768kHznLOS_FPGAnHALT_FPGARINGER_SYNC_FPGADC_ALM_FPGAAC_ALM_FPGAnBATT_FPGALED_RUN_FPGA_DRIVELED_ALM_FPGA_DRIVEnFAN_ALM_FPGANEXUS_nRESET_SOFTPLD_TDIPLD_TCKSD0_nRESET_SOFTPLD_TMSPLD_TDOFPGA_INTRMT_nRESET_SOFTSHELF_nFAN_ALM_FPGAEX1_A[0-25]EX1_A-1HWFH_NEXUSLUHW0_NEXUSLDHW0_NEXUSHW_CLK0_NEXUSCPU_nRESETCT_D[0]CT_FRAMECT_C8nCS_SRAMnCS_FLASHPROG_BCH_SEL[5]CH_SEL[6]CH_SEL[7]SVM_DSP_OUT[0]SVM_DSP_OUT[1]RTC_nINTnBACKnBAT_ALMMAIN No.15+15V+3.3VDDGHWCLK[0]LDHW[0]Mu/nACH_SEL[6]CH_SEL[7]SVM_DSP_OUT[0]SVM_DSP_OUT[1]VOX[0-3]VREF_7.5V+3.3VD+3.3VD+15V+3.3VD+3.3VD+1.25VD+3.3VD_B+3.3VD+1.2VD+3.3VD+3.3VD_B+15V+2.5VD+15V+1.8VDSD&RS232NEXUS(+SRAM)POWERCODECEC_CT CONFPGA+RTC+SVMSVM_VOXKX-TDE200GR IPCMPR CARD DETAILED BLOCK DIAGRAM (2/2)