TB9100 Reciter Service Manual Network Circuitry 61© Tait Electronics Limited January 2006Parallel port pins that are not externally connected are set to outputs, so thatthe internally connected paralleled inputs do not float.5.3 MemoryTwo types of memory are connected to the MPC main bus: flash EPROMand synchronous DRAM (SDRAM). The flash EPROM is used mainly forstoring the boot loader, a Linux kernel image and a compressed flash filesystem. The SDRAM is used as the main operating memory for storingboth code and data.5.3.1 Flash MemoryFlash EPROM (U301) is a standard 32Mbit (2Mx16) chip. The PCBfootprint provides for an upgrade to a 64Mbit (4Mx16) chip for softwareexpansion. Both types of chip have an internally segmented block structure,where each block can be individually erased or locked for protection. Thesechips also incorporate a unique identifier code and an OTP protection area,which can be used for product identification and software feature enabling.See the data sheet (reference 3) for details of the operation of this chip.Code does not normally execute out of the flash EPROM, except duringthe boot load process: it is quite slow due to the need for performing two16-bit memory fetches per 32-bit instruction for the MPC. The slow accesstime (70ns) of the flash also further slows execution speed, as five wait stateshave to be added to each memory cycle. The addition of wait states andother signal timing requirements are implemented by the GPCM (see“General-Purpose Chip Select Machine” on page 50).IPA3 I/P General purposedigital input 3“General-purpose Digital Inputs” on page 72IPA4 I/P General purposedigital input 4“Antenna Relay Control” on page 73IPA5 I/P General purposedigital input 5IPA6 I/P Rx gate inputIPA7 I/P Co-ax relay inputOP1 O/P noneOP2 O/P noneOP3 O/P noneTable 5.9 Parallel I/O Ports (Continued)Pin Name Direction Function Reference