Tait TM8000 Service Manual

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Tait TM8000 Service Manual Manual pdf 34 page image

34 General Description TM8100 Mobile Radio Service ManualOctober 2003 © Tait Electronics LimitedOutput to speakers After side-tone summation the audio is fed to an audio power amplifierand to the control head via a buffer amplifier. The output configurationof the audio power amplifier is balanced and drives an internal speakerand, optionally, an external speaker. The speaker loads are connected inparallel rather than being switched. The power delivered to each speakeris limited by its impedance. The internal speaker has 16-ohm impedancewhereas the external speaker can be as low as 4 ohms.2.4 Operation in Transmit ModeRF power amplifierand switchingIn this subsection the functioning of the radio in the transmit mode isdescribed. Refer to Figure 2.2. The RF power amplifier is a four-stageline-up with approximately 42 dB of power gain. The output of thefrequency synthesizer is first buffered to reduce kick during powerramping. The buffer output goes to a broad-band exciter IC thatproduces approximately 200 mW output. This is followed by anLDMOS driver producing up to 2 W output that is power-controlled.The final stage consists of two parallel LDMOS devices producingenough power to provide 25 W at the antenna.Output of RF power amplifier The output of the RF power amplifier passes through a dual-directionalcoupler, used for power control and monitoring, to the PIN switch. ThePIN switch toggles the antenna path between the receiver andtransmitter in receive and transmit modes respectively. Finally, the outputis low-pass-filtered to bring harmonic levels within specification.Power control The steady-state power output of the transmitter is regulated using ahardware control loop. The forward power output from the RF poweramplifier is sensed by the directional coupler and fed back to the powercontrol loop. The PA output power is controlled by varying driver gatebias voltage that has a calibrated maximum limit to prevent overdrive.The reference voltage for the control loop is supplied by a 13-bit DAC.The system driving the DAC supplies the steady-state voltage for a givenpower level as determined by factory calibration. The bandwidth of theloop is high to ensure that it does limit the ramping slope and hasapproximately 25 dB power control range. At low power settings thefinal bias is reduced to improve efficiency and maintain power controlrange.Ramping Power ramp-up consists of two stages:■ bias■ power rampingThe timing between these two stages is critical to achieving the correctoverall wave shape in order to meet the specification for transient ACP.