TM8100 Mobile Radio Service Manual General Description 37October 2003 © Tait Electronics Limited2.5 Operation of Frequency SynthesizerControl loops In this subsection the functioning of the frequency synthesizer isdescribed. Note that patents are pending for several aspects of thesynthesizer design. As may be seen from Figure 2.2, the frequencysynthesizer consists of two main parts:■ RF PLL■ FCLThe FCL generates a high-stability reference frequency that can be bothmodulated and offset in fine resolution steps. The RF PLL has fast-locking capability but coarse frequency resolution. The FCL output isthe reference frequency input for the RF PLL. It is frequency-locked tothe TCXO, thereby acquiring the TCXO's frequency stability.Modulation In dual-point modulation systems the modulation is applied to both thefrequency reference and the VCO in the RF PLL combining to producea flat modulation response down to DC. Reference modulation isusually applied directly to the TCXO.In the system employed in the TM8100 radio, the frequency reference iscomposed of the 13 MHz TCXO and the FCL, which itself requiresdual-point modulation injection to allow modulation down to DC.With another modulation point required in the RF PLL, this systemtherefore requires triple-point modulation. The modulation cross-overpoints occur at approximately 30 and 300 Hz as determined by the closedloop bandwidths of the FCL and RF PLL respectively.Frequency generationand acquisitionThe RF PLL is an integer-N type and has frequency resolution of25 kHz. Higher resolution cannot be achieved owing to acquisition-time requirements and so for any given frequency the error couldtherefore be as high as ±12.5 kHz. This error is corrected by altering thereference frequency to the RF PLL. The FCL supplies the referencefrequency and is able to adjust it up to ±300 ppm with better than0.1 ppm resolution (equivalent to better than 50 Hz resolution at the RFfrequency). The FCL offset will usually be different for receive andtransmit.Fast frequency settling Both the FCL and RF PLL employ frequency-acquisition speed-uptechniques to achieve fast frequency settling. The frequency-acquisitionprocess of the FCL and RF PLL is able to occur concurrently withminimal loop interaction owing to the very large difference in frequencystep size between the loops.