Xilinx LogiCORE IP Spartan-6 Getting Started Manual

Xilinx LogiCORE IP Spartan-6 Getting Started Manual Manual pdf 43 page image

Spartan-6 FPGA GTP Transceiver Wizard v1.8 www.xilinx.com 43UG546 (v1.8) December 14, 2010Using ChipScope Pro Cores with the Spartan-6 FPGA GTP Transceiver Wizard CoreUsing the ISE SimulatorWhen using the ISE Simulator (ISim), the required Xilinx simulation device libraries areprecompiled, and are updated automatically when service packs and IP updates areinstalled. There is no need to run CompXlib to compile libraries, or to manually downloadupdated libraries.The wizard also generates a perl script for use with ISim. To run a VHDL or Verilogsimulation of the wrapper, use the following instructions:1. Set the current directory to//simulation/functional2. Launch the simulation script:• For Windows- simulate_isim.bat• For Linux- % simulate_isim.shThe ISim script compiles the example design and test bench, and adds the relevant signalsto the wave window.Using ChipScope Pro Cores with the Spartan-6 FPGA GTPTransceiver Wizard CoreThe ChipScope™ Pro ICON and VIO cores aid in debugging and validating the design inboard. To assist with debugging, these cores are provided with the Spartan-6 FPGA GTPTransceiver Wizard core, which is enabled by setting USE_CHIPSCOPE as 1 in the_top_example_design file.Table 4-2: Required ISim Simulation LibrariesHDL Library Source DirectoriesVerilog UNISIMS_VER <Xilinx dir>/verilog/hdp/<OS>/unisims_verVHDL UNISIM <Xilinx dir>/vhdl/hdp/<OS>/unisimNote: OS refers to the following operating systems: lin, lin64, nt, nt64.