Xilinx LogiCORE IP Spartan-6 Getting Started Manual

Xilinx LogiCORE IP Spartan-6 Getting Started Manual Manual pdf 47 page image

Spartan-6 FPGA GTP Transceiver Wizard v1.8 www.xilinx.com 47UG546 (v1.8) December 14, 2010Directory and File Contents/docThe doc directory contains the PDF documentation provided with the core./example designThe example design directory contains the example design files provided with the core.Table 5-3: Doc DirectoryName Description//docs6_gtpwizard_ds713.pdf Spartan-6 FPGA GTP Transceiver Wizard v1.8 Data Sheets6_gtpwizard_gsg546.pdf LogiCORE IP Spartan-6 FPGA GTP Transceiver Wizardv1.8 Getting Started GuideBack to TopTable 5-4: Example Design DirectoryName Description//example_designframe_check.v[hd] Frame-check logic to be instantiated in theexample design.frame_gen.v[hd] Frame-generator logic to be instantiated in theexample design.gtp_attributes.ucf Constraints file containing the GTP attributesgenerated by the GTP Wizard GUI settings._top.ucf Constraint file for mapping the GTP wrapperexample design onto a Spartan-6 device._top.v[hd] Top-level example design. Contains GTPtransceiver wrapper, reset logic, andinstantiations for frame generator, frame-checker,and TX sync logic. Also contains definitions fortest frame data and ChipScope™ Pro moduleinstantiation. See Figure 3-1, page 15.Back to Top