Xilinx RocketIO User Manual

Also see for RocketIO: User guide User guide User guide

Contents

Xilinx RocketIO User Manual Manual pdf 15 page image

UG024 (v1.5) October 16, 2002 www.xilinx.com 15RocketIO™ Transceiver User Guide 1-800-255-7778RChapter 2RocketIO Transceiver OverviewBasic Architecture and CapabilitiesThe RocketIO transceiver is based on Mindspeed’s SkyRail™ technology. Figure 2-1,page 16, depicts an overall block diagram of the transceiver. Up to 24 transceiver modulesare available on a single Virtex-II Pro FPGA, depending on the part being used. Table 2-1shows the RocketIO cores available by device.The transceiver module is designed to operate at any serial bit rate in the range of622 Mb/s to 3.125 Gb/s per channel, including the specific bit rates used by thecommunications standards listed in Table 2-2. The serial bit rate need not be configured inthe transceiver, as the operating frequency is implied by the received data, the referenceclock applied, and the SERDES_10B attribute (Table 2-3, page 16).Table 2-1: RocketIO CoresDevice RocketIO Cores Device RocketIO CoresXC2VP2 4 XC2VP40 0 or 12XC2VP4 4 XC2VP50 0 or 16XC2VP7 8 XC2VP70 20XC2VP20 8 XC2VP100 0 or 20XC2VP30 8 XC2VP125 0, 20, or 24Table 2-2: Communications Standards Supported by RocketIO TransceiverMode Channels(Lanes) (1)I/O Bit Rate(Gb/s)Fibre Channel 1 1.062.12Gbit Ethernet 1 1.25XAUI (10-Gbit Ethernet) 4 3.125Infiniband 1, 4, 12 2.5Aurora (Xilinx protocol) 1, 2, 3, 4, ... 0.622 – 3.125Custom Mode 1, 2, 3, 4, ... 0.622 – 3.125Notes:1. One channel is considered to be one transceiver.