Xilinx RocketIO User Manual

Also see for RocketIO: User guide User guide User guide

Contents

Xilinx RocketIO User Manual Manual pdf 18 page image

18 www.xilinx.com UG024 (v1.5) October 16, 20021-800-255-7778 RocketIO™ Transceiver User GuideChapter 2: RocketIO Transceiver OverviewRClock and Data RecoveryThe clock/data recovery (CDR) circuits lock to the reference clock automatically if the datais not present. For proper operation, frequency variations of REFCLK, TXUSRCLK,RXUSRCLK, and the incoming stream (RXRECCLK) must not exceed ±100 ppm.It is critical to keep power supply noise low in order to minimize common and differentialnoise modes into the clock/data recovery circuitry. See PCB Design Requirements,page 89, for more details.TransmitterFPGA Transmit InterfaceThe FPGA can send either one, two, or four characters of data to the transmitter. Eachcharacter can be either 8 bits or 10 bits wide. If 8-bit data is applied, the additional inputsbecome control signals for the 8B/10B encoder. When the 8B/10B encoder is bypassed, the10-bit character order is:TXCHARDISPMODE[0]TXCHARDISPVAL[0]TXDATA[7:0]Refer to Figure 3-10, page 59, for a graphical representation of the transmitted 10-bitcharacter.8B/10B EncoderA bypassable 8B/10B encoder is included. The encoder uses the same 256 data charactersand 12 control characters that are used for Gigabit Ethernet, XAUI, Fibre Channel, andInfiniBand.The encoder accepts 8 bits of data along with a K-character signal for a total of 9 bits percharacter applied. If the K-character signal is High, the data is encoded into one of the 12possible K-characters available in the 8B/10B code. If the K-character input is Low, the 8bits are encoded as standard data. If the K-character input is High, and a user applies otherthan one of the 12 possible combinations, TXKERR indicates the error.Disparity ControlThe 8B/10B encoder is initialized with a negative running disparity.TXRUNDISP signals the transmitter’s current running disparity.Bits TXCHARDISPMODE and TXCHARDISPVAL control the generation of runningdisparity before each byte, as shown in Table 2-5.For example, the transceiver can generate the sequenceK28.5+ K28.5+ K28.5– K28.5–orK28.5– K28.5– K28.5+ K28.5+Table 2-5: Running Disparity Control{txchardispmode,txchardispval} Function00 Maintain running disparity normally01 Invert normally generated running disparity beforeencoding this byte10 Set negative running disparity before encoding this byte11 Set positive running disparity before encoding this byte