ZCU102 Evaluation Board User Guide www.xilinx.com 109UG1182 (v1.2) March 20, 2017Chapter 3: Board Component DescriptionsSystem Reset Pushbuttons[Figure 2-1, callout 26]Figure 3-43 shows the reset circuitry for the processing system.PS_POR_B ResetDepressing and then releasing pushbutton SW4 causes net PS_POR_B to strobe Low. Thisreset is used to hold the PS in reset until all PS power supplies are at the required voltagelevels. It must be held Low through PS power-up. PS_POR_B should be generated by thepower supply power-good signal. When the voltage at IN1 is below its threshold or EN1(P.B. switch SW4 is pressed) goes Low, OUT1 (PS_POR_B) goes Low.PS_SRST_B ResetDepressing and then releasing pushbutton SW3 causes net PS_SRST_B to strobe Low. Thisreset is used to force a system reset. It can be tied or pulled High, and can be High duringthe PS supply power ramps. When the voltage at IN2 is below its threshold or EN2 (P.B.switch SW3 is pressed) goes Low, OUT2 (PS_SRST_B) goes Low.Active-Low Reset Output RST_B asserts when any of the monitored voltages (IN_) fallsbelow its respective threshold, any EN_ goes Low, or MR is asserted. RST_B remains assertedfor the reset time-out period after all of the monitored voltages exceed their respectivethreshold, all EN_ are High, all OUT_ are high, and MR is de-asserted. See the ZynqUltraScale+ MPSoC Technical Reference Manual (UG1085) [Ref 2] for information forinformation concerning the resets.X-Ref Target - Figure 3-43Figure 3-43: PS SRST_B and POR_B Pushbutton Switches SW3 and SW4;Send Feedback