MC96FM204/FM21496 April 7, 2016 Ver. 1.811.5.4 16-Bit PPG ModeThe timer 1 has a PPG (Programmable Pulse Generation) function. In PPG mode, T1O/PWM1O pin outputsup to 16-bit resolution PWM output. This pin should be configured as a PWM output by setting PFSRL00 to ‘1’ .The period of the PWM output is determined by the T1ADRH/T1ADRL. And the duty of the PWM output isdetermined by the T1BDRH/T1BDRL.T1MS[1:0] T1POLReloadA MatchT1CCT1ENPrescalerfxMUXfx/2fx/4fx/64fx/512fx/2048fx/8fx/1Comparator16-bit CounterT1CNTH/T1CNTL16-bit B Data RegisterT1BDRH/T1BDRLClearB MatchEdgeDetectorT1ECEEC1Buffer Register BComparator16-bit A Data RegisterT1ADRH/T1ADRLT1IFRINT_ACKClearTo interruptblockA MatchBuffer Register AReloadPulseGeneratorT1O/PWM1ORT1EN3T1CK[2:0]2T1ENT1CRH1ADDRESS:BBHINITIAL VALUE : 0000_0000B– T1MS1 T1MS0 – – – T1CC– 1 1 – – – XT1CK2T1CRLXADDRESS:BAHINITIAL VALUE : 0000_0000BT1CK1 T1CK0 T1IFR – T1POL T1ECE T1CNTRX X X – X X XA MatchT1CCT1ENA MatchT1CCT1ENNOTE) The T1EN is automatically cleared to logic “0” after one pulse is generated at a PPG one-shot mode.Figure 11.13 16-Bit PPG Mode for Timer 1
