Chapter 4 613Ch Test 8254.3Dh Reserved3Eh Test 8259 interrupt mask bits for channel 13Fh Reserved40h Test 8259 interrupt mask bits for channel 241h Reserved42h Reserved43h Test 8259 functionality44h Reserved45h Reserved46h Reserved47h Initialize EISA slot48h Reserved49h 1. Calculate total memory by testing the last double word of each 64K.2. Program writes allocation for AMD K5 CPU.4Ah Reserved4Bh Reserved4Ch Reserved4Dh Reserved4Eh 1. Program MTRR of M1 CPU.2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheablerange.3. Initialize the APIC for P6 class CPU.4. On MP platform, adjust the cacheable range to smaller one in case thecacheableranges between each CPU are not identical.4Fh Reserved50h Initialize USB51h Reserved52h Test all memory (clear all extended memory to 0)53h Reserved54h Reserved55h Display number of processors (multi-processor platform)56h Reserved57h 1. Display PnP logo2. Early ISA PnP initialization-Assign CSN to every ISA PnP device.58h Reserved59h Initialize the combined Trend Anti-Virus code.5Ah Reserved5Bh (Optional Feature)Show message for entering AWDFLASH.EXE from FDD (optional)5Ch Reserved.Checkpoint Description