IBM p5 550 Technical Overview And Introduction

Also see for p5 550: Technical overview and introduction

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22 p5-550 Technical Overview and Introductionsimilar to the following (False, as used in this output, signifies that thevalue cannot be changed through an AIX command interface):type powerPC_POWER5 Processor type Falsefrequency 165600000 Processor Speed Falsesmt_enabled true Processor SMT enabled Falsesmt_threads 2 Processor SMT threads Falsestate enable Processor state Falsepmcycles -m This command (in AIX 5L) uses the performance monitor cyclecounter and the processor real-time clock to measure the actualprocessor clock speed in MHz. The following is the output of a 2-wayp5-550 running at 1.65 GHz system with SMT enabled:Cpu 0 runs at 1656 MHzCpu 1 runs at 1656 MHzCpu 2 runs at 1656 MHzCpu 3 runs at 1656 MHz2.3 Memory subsystemThe p5-550 system offers pluggable DIMMs for memory. Each processor card contains eightslots for up to eight pluggable DIMMs. The minimum memory for a p5-550 processor-basedsystem is 1 GB and 64 GB as a maximum installable memory option. The p5-550 memorycapacity is dependant on the number of processors ordered for the system and on the type ofmemory and functionality required. Figure 2-6 shows the offerings and memory slotavailability.2.3.1 Memory placement rulesThe memory features available at the time of writing for the p5-550 are listed in 1.3.2,“Memory features” on page 7.Each memory feature consists of four DIMMs, or quad, and must be installed according toFigure 2-6. The first quad slots are J0A, J1A, J0C, and J1C, and for the second quad, theslots are J0B, J1B, J0D, and J1D.Note: The pmcycles command is part of the bos.pmapi fileset. First check whether thatcomponent is installed using the lslpp -l bos.pmapi command.Note: A quad must consist of a single feature (that is made of four identical DIMMs). MixedDIMM capacities in a quad will result in reduced RAS.