Lattice Semiconductor ECP5 User Manual

Also see for ECP5 Versa: User guide User guide Technical note Technical notes Usage Guide

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Lattice Semiconductor ECP5 User Manual Manual pdf 15 page image

ECP5 VIP Processor BoardEvaluation Board User Guide© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names aretrademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.FPGA-EB-02001-1.2 15Table 6.1. Upstream Connector Mapping (Continued)J10 J11Pin number onConnector Net Name ECP5 Ball Pin Number onConnector Net Name ECP5 Ball43 SDA AJ1 43 UP_GPIO32 F1344 HDRXN0_D1CH1 AM21 44 UP_GPIO40 A1445 FTDI_TCK AK5 45 UP_GPIO37 D1446 GND — 46 UP_GPIO41 B447 FTDI_TDO — 47 UP_GPIO38 C1448 HDRXP0_D0CH0 AM8 48 UP_GPIO42 F1549 FTDI_TDI — 49 UP_GPIO45 A1550 HDRXN0_D0CH0 AM9 50 UP_GPIO43 D1551 FTDI_TMS AM5 51 UP_GPIO50 D1752 GND — 52 UP_GPIO44 C1553 DIR_GPIO5 — 53 GND —54 HDRXP0_D0CH1 AM11 54 GND —55 GND — 55 GND —56 HDRXN0_D0CH1 AM12 56 GND —57 GND — 57 2V5 —58 GND — 58 2V5 —59 GND — 59 2V5 —60 DIR_GPIO1 — 60 2V5 —Table 6.2. Downstream Connector Pin MappingJ12 J13Pin number onConnector Net Name ECP5 Ball Pin number onConnector Net Name ECP5 Ball1 GND — 1 3V3 —2 12V — 2 3V3 —3 MIPITX_CLKP A18 3 3V3 —4 12V — 4 3V3 —5 MIPITX_CLKN C18 5 LDI_TX_D0_P W316 12V — 6 LDI_TX_D1_P AB307 GND — 7 LDI_TX_D0_N Y328 12V — 8 LDI_TX_D1_N AB299 MIPITX_DATA0P F18, R27 9 LDI_TX_D3_P R3210 MIPITX_DATA2P D19, U29 10 LDI_TX_D2_P AD2711 MIPITX_DATA0N A19, T27 11 LDI_TX_D3_N T3112 MIPITX_DATA2N E19, V29 12 LDI_TX_D2_N AE2713 GND — 13 DW_GPIO5 T2914 GND — 14 DW_GPIO27 AB2815 MIPITX_DATA1P B19, R29 15 DW_GPIO6 U2816 MIPITX_DATA3P F19, P31 16 DW_GPIO28 AB2717 MIPITX_DATA1N C19, T28 17 DW_GPIO7 V2718 MIPITX_DATA3N P30, A20 18 DW_GPIO29 AC2619 GND — 19 DW_GPIO8 V2620 GND — 20 GND —21 DW_GPIO46 A25 21 GND —