Lattice Semiconductor MachXO2 User Manual
Also see for MachXO2 Series: User guideUsage GuideProgramming and Configuration Usage GuideUser guideQuick start
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Contents
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IPUG92_01.2, October 2012 14 LPDDR SDRAM Controller User’s GuideThe IPexpress™ tool is used to create IP and architectural modules in the Diamond design software. Table 3-1 pro-vides a list of user-configurable parameters for this IP core. The parameter settings are specified using the LPDDRSDRAM Controller IP core Configuration GUI in IPexpress.Mode TabThe Memory Type Selection field is not a user option but is selected by IPexpress when an LPDDR SDRAM Con-troller core is selected from the IPexpress IP core list. Figure 3-1 shows the contents of the Mode tab.Table 3-1. LPDDR Core Configuration ParametersParameterConfigurationConfiguration 1 Configuration 2 Configuration 3 Configuration 4Design Entry Verilog HDLDevice Family MachXO2Part Name LCMXO2-7000HE-6BG256CMemory Micron MT46H64M16LFClock 133 MHzData Width 16Wishbone Disable Disable One Port One PortRow Width 12 12 12 12Col Width 9 9 9 9Auto Refresh Burst Count 8 8 8 2IO Auto Training Enable Disable Enable EnablePeriodic IO Auto Retraining Enable Disable Enable EnablePartial Array Self Refresh FullMemory Clock off DisableBurst Length 4Burst Type SequentialTRCD 3TRAS 8TRFC 15TMRD 2TRP 3TRC 12TREFI 1040TWTR 2TXP 2TCKE 4TXSR 27TSRR 3TSRC 2TWR 2Chapter 3:Parameter Settings |
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